saa5000
Abstract: TBA2800
Text: ICs for Consumer Electronics and Multimedia Central Control Units CCU3000 and CCU3001, C C U 3000-I and C C U 3001-I Central Control Units PLCC68 CCU3000 and CCU3001 are microcontrollers in CMOS technol ogy constructed especially for use in television sets and based on
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CCU3000
CCU3001,
3000-I
3001-I
PLCC68)
CCU3001
65C02
CCU3000:
CCU3001:
saa5000
TBA2800
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Untitled
Abstract: No abstract text available
Text: MT9080 SMX - Switch Matrix Module CMOS MITEL 9161-002-126-NA Features • Timeslot interchange circuit for digital switch ISSUE 3 January 1993 Ordering Information MT9080AP applications 84 Pin PLCC •40’ C to 70°C • 16bitw idedatabusl/0 • 2048 x 16 bit wide byte capacity
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MT9080
9161-002-126-NA
MT9080AP
16bitw
MT9080
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Untitled
Abstract: No abstract text available
Text: CMOS ST-BUS FAMILY MT90820 Large Digital Switch M ITEL Features • ISSUE 2 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Decem ber 1996 Ordering Information MT90820AP 84 Pin PLCC MT90820AL 100 Pin PQFP -40 to +85°C Per-channel variable or constant throughput delay
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MT90820
MT90820AP
MT90820AL
048Mb/s,
096Mb/s
192Mb/s
MT90820
192Mb/s,
096Mb/s
048Mb/s.
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MT8985ap
Abstract: DIP-40 MT8972 MT8980 MT8980D MT8985 MT8985AE MT8985AL PLCC-44 QFP-44
Text: CMOS ST-BUS FAMILY MT8985 Enhanced Digital Switch Features • • • • • • • • • ISSUE 5 Ordering Information MT8985AE 40 Pin Plastic DIP MT8985AP 44 Pin PLCC MT8985AL 44 Pin QFP -40°C to +85°C 256 x 256 channel non-blocking switch Programmable frame integrity for wideband
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MT8985
MT8985AE
MT8985AP
MT8985AL
DIP-40,
PLCC-44
QFP-44
MT8980
MT8985
MT8980D
MT8985ap
DIP-40
MT8972
MT8985AE
MT8985AL
QFP-44
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MT8985AP
Abstract: DIP-40 MT8980 MT8980D MT8985 MT8985AC MT8985AE MT8985AL PLCC-44 QFP-44
Text: CMOS ST-BUS FAMILY MT8985 Enhanced Digital Switch Features • • • • • • • • • ISSUE 4 Ordering Information MT8985AC 40 Pin Ceramic DIP MT8985AE 40 Pin Plastic DIP MT8985AP 44 Pin PLCC MT8985AL 44 Pin QFP -40°C to +85°C 256 x 256 channel non-blocking switch
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MT8985
MT8985AC
MT8985AE
MT8985AP
MT8985AL
DIP-40,
PLCC-44
QFP-44
MT8980
MT8985
MT8985AP
DIP-40
MT8980D
MT8985AC
MT8985AE
MT8985AL
QFP-44
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Modem Chips
Abstract: ATM8 PCM30 PM4341 PM4344 PM6341 PM6344 PM7339
Text: PM7339 S/UNI -CDB PMC-Sierra,Inc. Quad Cell Delineation Block Device FEATURES • Provides PLCP frame synchronization, path overhead extraction and cell extraction for DS1 and E1 PLCP formatted streams. • Provides a 50 MHz 8-bit wide or 16-bit wide UTOPIA FIFO buffer in the
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PM7339
16-bit
PM7348
PM5347
PMC-2000367
Modem Chips
ATM8
PCM30
PM4341
PM4344
PM6341
PM6344
PM7339
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mt8870
Abstract: DIP-40 MT8980 MT8980D MT8985 MT8985AC MT8985AE MT8985AL MT8985AP PLCC-44
Text: CMOS ST-BUS FAMILY MT8985 Enhanced Digital Switch Features • • • • • • • • • ISSUE 4 Ordering Information MT8985AC 40 Pin Ceramic DIP MT8985AE 40 Pin Plastic DIP MT8985AP 44 Pin PLCC MT8985AL 44 Pin QFP -40°C to +85°C 256 x 256 channel non-blocking switch
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MT8985
MT8985AC
MT8985AE
MT8985AP
MT8985AL
DIP-40,
PLCC-44
QFP-44
MT8980
MT8985
mt8870
DIP-40
MT8980D
MT8985AC
MT8985AE
MT8985AL
MT8985AP
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PCM30
Abstract: PM4341 PM4344 PM6341 PM6344 PM7339 AAL5 SAR
Text: PM7339 S/UNI -CDB PMC-Sierra,Inc. Quad Cell Delineation Block Device FEATURES • Provides PLCP frame synchronization, path overhead extraction and cell extraction for DS1 and E1 PLCP formatted streams. • Provides a 50 MHz 8-bit wide or 16-bit wide UTOPIA FIFO buffer in the
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PM7339
16-bit
PM7348
PM5347
PMC-2000367
PCM30
PM4341
PM4344
PM6341
PM6344
PM7339
AAL5 SAR
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XC2064
Abstract: XC3030A xc3142 PP175 Xilinx XC3090 xc2064 fpga xact xc3090 XC3190 Xilinx XC3090A X04008
Text: Component Availability Pins 44 Type Plastic PLCC Plastic DIP Plastic VQFP Plastic PLCC Ceramic PGA Plastic PLCC Ceramic PGA Plastic PQFP Plastic TQFP Code PC44 PD48 VQ64 PC 68 PG68 PC84 PG84 PQ100 TQ100 ✓ ✓ ✓ ✓ ✓ ✓ XC2064 48 64 68 XC2O10 ✓ ✓
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XC2064
XC2O10
XC2064L
XC2O10L
XC3020
XC3030
XC3042
XC3064
XC3090
XC3020A
XC3030A
xc3142
PP175
Xilinx XC3090
xc2064 fpga
xact xc3090
XC3190
Xilinx XC3090A
X04008
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FAS101
Abstract: ISP1040B ESP100A FAS216 FAS366U ISP2100 WD1003 intel 80188 fas236u FAS201
Text: Section 1 Company Overview Company Overview 1 – Company Overview 1–2 Product Catalog 97-526-00 A 1 – Company Overview Company Overview About QLogic Rapid developments in CPU architecture coupled with ever increasing levels of silicon integration continue to push today’s information systems to new
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ISP2100
64-bit
C/131
C/158
FAS101
ISP1040B
ESP100A
FAS216
FAS366U
WD1003
intel 80188
fas236u
FAS201
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Untitled
Abstract: No abstract text available
Text: CMOS ST-BUS FAMILY MT8985 Enhanced Digital Switch Features • • • • • • • • • ISSUE 5 Ordering Information MT8985AE 40 Pin Plastic DIP MT8985AP 44 Pin PLCC MT8985AL 44 Pin QFP -40°C to +85°C 256 x 256 channel non-blocking switch Programmable frame integrity for wideband
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MT8985
MT8985AE
MT8985AP
MT8985AL
DIP-40,
PLCC-44
QFP-44
MT8980
MT8985
MT8980D
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gps MTK command
Abstract: Basic ARM block diagram sirfstar II arm gsm MTC-30585 arm gsm GPS qualcomm chipsets "at command" qualcomm chipsets at command gsm modem with arm GSP2E
Text: White Paper: FPGAs R Using FPGAs with ARM Processors Author: Brant Soudan WP123 v1.1 August 18, 2000 Summary This white paper discusses interfacing Xilinx FPGAs with off-the-shelf ARM processors. It covers some of the available ARM Application Specific Standard Products (ASSPs) and
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WP123
CLK90
CLK180
CLK270
com/xapp/xapp132
gps MTK command
Basic ARM block diagram
sirfstar II
arm gsm
MTC-30585
arm gsm GPS
qualcomm chipsets "at command"
qualcomm chipsets at command
gsm modem with arm
GSP2E
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XRT79L71IB
Abstract: 17X17 GR-253 GR-499-CORE XRT79L71
Text: XRT79L71 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE JUNE 2007 GENERAL DESCRIPTION The XRT79L71 is a single channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller and Line Interface Unit with Jitter Attenuator that is designed to support ATM direct
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XRT79L71
XRT79L71
XRT79L71IB
17X17
GR-253
GR-499-CORE
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IDT3051
Abstract: hdlc 17X17 GR-253 GR-499-CORE XRT79L71 XRT79L71IB t59b
Text: PRELIMINARY XRT79L71 1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMER/LIU COMBO - HARDWARE OCTOBER 2010 GENERAL DESCRIPTION REV. P2.0.0 • Receiver Monitor mode handles up to 20 dB flat loss with 6 dB cable attenuation The XRT79L71 is a single channel, integrated DS3/
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XRT79L71
XRT79L71
IDT3051
hdlc
17X17
GR-253
GR-499-CORE
XRT79L71IB
t59b
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Untitled
Abstract: No abstract text available
Text: xr PRELIMINARY XRT79L71 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE DESCRIPTION OCTOBER 2005 GENERAL DESCRIPTION The XRT79L71 is a single channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller and Line Interface Unit with Jitter
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XRT79L71
XRT79L71
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N193
Abstract: 1N194 TXC-02050 N194 66cv5
Text: JT2F Device 6 Mbit/s Framer TXC-03702 DATA SHEET Preliminary FEATURES DESCRIPTION • Framer for: - ITU Recommendation G.704 - NTT-specified 6312 Kbit/s format The JT2 Framer JT2F is a CMOS VLSI device that provides the functions needed to frame a wideband
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TXC-03702
TXC-03702-MB
N193
1N194
TXC-02050
N194
66cv5
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Digital Alarm Clock by ttl
Abstract: TAIS SOT TXC-04002-AIPL
Text: ADMA-E1 Device 2 Mbit/s to TU-12 Async Mapper-Desync TXC-04002 DATA SHEET FEATURES DESCRIPTION • Add/drop two 2048 kbit/s signals from a Virtual Container-4 VC-4 using Tributary Unit-12s (TU-12s) • Independent add/drop mode between ports • Selectable HDB3 positive/negative rail or NRZ
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TU-12
TXC-04002
Unit-12s
TU-12s)
TXC-04002-MB
Digital Alarm Clock by ttl
TAIS SOT
TXC-04002-AIPL
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T7270
Abstract: D2 Technologies DSA00415105
Text: Product Brief April 1997 T7270 Time-Slot Interchanger TSI Features • Nonblocking time/space switch with four independently controlled serial time-division multiplexed (TDM) buses ■ Frame integrity to ensure proper operation with wideband data (ISDN H-channels), and optional
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T7270
PN97-069TIC
D2 Technologies
DSA00415105
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HIGHWAY 20 PIN IC PIN DIAGRAM
Abstract: No abstract text available
Text: Product Brief April 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7270Time-Slot Interchanger TSI Features Description • Nonblocking time/space switch with four independently controlled serial time-division multiplexed (TDM) buses
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T7270Time-Slot
T7270
theT7270
005002b
HIGHWAY 20 PIN IC PIN DIAGRAM
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am79c30a preliminary
Abstract: Am79C30A AM79C30APC
Text: a Preliminary Advanced Micro Devices Am79C30A Digital Subscriber Controller DSC DISTINCTIVE CHARACTERISTICS • Combines CCITT 1.430 S/T Interface transceiver, D-channel LAPD processor, and audio processor in a single chip ■ Interrupt-driven microprocessor interface
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Am79C30A
AM79C30A
44-Pin
40-Pin
am79c30a preliminary
AM79C30APC
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74245 BUFFER IC
Abstract: pin diagram of 74245 BUFFER IC IC 74245 latch 74373 80386 microprocessor pin out diagram 74245 buffer 74373 cmos dual s-r latch 74245 BIDIRECTIONAL BUFFER data 74245 20 pin ic Ob2 tube
Text: V 7 \ USER-CONFIGURABLE m ic r o p r o c e s s o r p e r ip h e r a l C D D 1/100 L rD I4 U U FEATURES GENERAL DESCRIPTION • Bus I/O — Register Intensive BUSTER EPLD. • Erasable, User-Configurable Logic Device for Customized Microprocessor Peripheral
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32-bit
25MHz
EPB1400-2
EPB1400
100pF.
74245 BUFFER IC
pin diagram of 74245 BUFFER IC
IC 74245
latch 74373
80386 microprocessor pin out diagram
74245 buffer
74373 cmos dual s-r latch
74245 BIDIRECTIONAL BUFFER data
74245 20 pin ic
Ob2 tube
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Untitled
Abstract: No abstract text available
Text: JT2F Device 6 Mbit/s Framer TXC-03702 DATA SHEET Preliminary DESCRIPTION = • Framer for: - ITU Recommendation G.704 - NTT-specified 6312 Kbit/s format The JT2 Framer JT2F is a CMOS VLSI device that provides the functions needed to frame a wideband payload to G.704 and the NTT-specified 6312 Kbit/s
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TXC-03702
TXC-03702-M
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TAIS SOT
Abstract: VC12
Text: ADMA-E1 Device 2 Mbit/s to TU-12 Async Mapper-Desync TXC-04002B DATA SHEET FEATURES DESCRIPTION • Add/drop two 2048 kbit/s signals from a Virtual Container-4 VC-4 using Tributary Unit-12s (TU-12s) • Independent add/drop mode between ports • Selectable HDB3 positive/negative rail or NRZ E1
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TU-12
TXC-04002B
Unit-12s
TU-12s)
TXC-04002B-MB
TAIS SOT
VC12
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Untitled
Abstract: No abstract text available
Text: BACK ADMA-E1 Device 2 Mbit/s to TU-12 Async Mapper-Desync TXC-04002B DATA SHEET FEATURES DESCRIPTION • Add/drop two 2048 kbit/s signals from a Virtual Container-4 VC-4 using Tributary Unit-12s (TU-12s) • Independent add/drop mode between ports • Selectable HDB3 positive/negative rail or NRZ E1
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TU-12
TXC-04002B
Unit-12s
TU-12s)
TU-12s
TXC-04002B-MB
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