MO-150
Abstract: MSSO002E
Text: MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB R-PDSO-G* PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN
|
Original
|
PDF
|
MSSO002E
MO-150
MO-150
MSSO002E
|
DSD1796
Abstract: No abstract text available
Text: BurrĆBrown Products from Texas Instruments DSD1796 SLES101A – DECEMBER 2003 – REVISED NOVEMBER 2006 24ĆBIT, 192ĆkHz SAMPLING, ADVANCED SEGMENT, AUDIO STEREO DIGITALĆTOĆANALOG CONVERTER FEATURES D Supports Both DSD and PCM Formats D 24-Bit Resolution
|
Original
|
PDF
|
DSD1796
SLES101A
24BIT,
192kHz
24-Bit
28-Lead
DSD1796
|
Untitled
Abstract: No abstract text available
Text: SN74AHC04 SN54AHC04 www.ti.com SCLS231N – OCTOBER 1995 – REVISED MAY 2013 HEX INVERTERS Check for Samples: SN74AHC04, SN54AHC04 FEATURES 1 Operating Range 2-V to 5.5-V Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHC04 . . . JORWP ACKAGE SN74AHC04 . . . D,DB,DGV,N,NS,
|
Original
|
PDF
|
SN74AHC04
SN54AHC04
SCLS231N
SN74AHC04,
|
pin diagram of SN74LS244N
Abstract: No abstract text available
Text: SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 Memory Address Registers D PNP Inputs Reduce DC Loading
|
Original
|
PDF
|
SN54LS240,
SN54LS241,
SN54LS244,
SN54S240,
SN54S241,
SN54S244
SN74LS240,
SN74LS241,
SN74LS244,
SN74S240,
pin diagram of SN74LS244N
|
Untitled
Abstract: No abstract text available
Text: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC
|
Original
|
PDF
|
SN54AC11,
SN74AC11
SCAS532D
SN54AC11
|
Untitled
Abstract: No abstract text available
Text: SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D SN54ABT377 . . . J OR W PACKAGE SN74ABT377A . . . DB, DW, N, OR PW PACKAGE TOP VIEW CLKEN 1Q 1D 2D 2Q 3Q 3D 4D 4Q
|
Original
|
PDF
|
SN54ABT377,
SN74ABT377A
SCBS156E
SN54ABT377
|
Untitled
Abstract: No abstract text available
Text: PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) 5962-9557401QCA ACTIVE CDIP J
|
Original
|
PDF
|
24-Jan-2013
5962-9557401QCA
5962-9557401QC
SNJ5432J
5962-9557401QDA
5962-9557401QD
SNJ5432W
JM38510/30501B2A
JM38510/
30501B2A
|
ALS573C
Abstract: No abstract text available
Text: SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A OCTAL DĆTYPE TRANSPARENT LATCHES WITH 3ĆSTATE OUTPUTS SDAS048D − DECEMBER 1989 − REVISED JANUARY 1995 OE 1D 2D 3D 4D 5D 6D 7D 8D GND description These octal D-type transparent latches feature 3-state outputs designed specifically for driving
|
Original
|
PDF
|
SN54ALS573C,
SN54AS573A,
SN74ALS573C,
SN74AS573A
SDAS048D
SN54AS573A
ALS573C
|
Untitled
Abstract: No abstract text available
Text: SN74LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
|
Original
|
PDF
|
SN74LVC821A
10-BIT
SCAS304J
000-V
A114-A)
|
marking ha02
Abstract: SN74AHC02-EP
Text: SN54AHC02, SN74AHC02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS254K− DECEMBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A − 200-V Machine Model (A115-A)
|
Original
|
PDF
|
SN54AHC02,
SN74AHC02
SCLS254K-
SN54AHC02
SN74AHC02
000-V
A114-A)
A115-A)
marking ha02
SN74AHC02-EP
|
Untitled
Abstract: No abstract text available
Text: SN54LV163A, SN74LV163A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS405F − APRIL 1998 − REVISED APRIL 2005 2 15 3 14 4 13 12 5 6 11 7 10 8 9 VCC RCO QA QB QC QD ENT LOAD CLK A B C D ENP 16 CLK CLR NC VCC RCO 1 SN54LV163A . . . FK PACKAGE TOP VIEW 15 RCO 14 QA
|
Original
|
PDF
|
SN54LV163A,
SN74LV163A
SCLS405F
000-V
A114-A)
A115-A)
SN54LV163A
|
SN74LV161
Abstract: No abstract text available
Text: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4
|
Original
|
PDF
|
SN54LV161A,
SN74LV161A
SCLS404F
SN54LV161A
SN74LV161A
000-V
SN74LV161
|
Untitled
Abstract: No abstract text available
Text: CD54HCT573, CD74HCT573 OCTAL TRANSPARENT DĆTYPE LATCHES WITH 3ĆSTATE OUTPUTS SCLS455C − FEBRUARY 2001 − REVISED MAY 2004 D 4.5-V to 5.5-V VCC Operation D Wide Operating Temperature Range of −55°C to 125°C CD54HCT573 . . . F PACKAGE CD74HCT573 . . . DB, E, OR M PACKAGE
|
Original
|
PDF
|
CD54HCT573,
CD74HCT573
SCLS455C
CD54HCT573
|
Untitled
Abstract: No abstract text available
Text: SN54AC11, SN74AC11 TRIPLE 3ĆINPUT POSITIVEĆAND GATES SCAS532D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y 2A NC 2B NC
|
Original
|
PDF
|
SN54AC11,
SN74AC11
SCAS532D
SN54AC11
SN74AC11
SN74AC11N
SN74AC11D
SN74AC11DR
SN74AC11NSR
|
|
|
Untitled
Abstract: No abstract text available
Text: SN75LP196 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS294A – APRIL 1998 – REVISED JUNE 1999 D D D D D D D D D D DB, DW, N, OR PW PACKAGE TOP VIEW Single-Chip RS-232 Interface for an External Modem or Other Computer Peripheral Serial Port Designed to Transmit and Receive 4-µs
|
Original
|
PDF
|
SN75LP196
RS-232
SLLS294A
TIA/EIA-232-F
SN75LP1185
SN75196
|
Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
|
Original
|
PDF
|
SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
SNS74LVC2G53
scyb014
scyb005
scym001
|
Untitled
Abstract: No abstract text available
Text: SN74LVC861A 10-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS309I – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 6.4 ns at 3.3 V Typical VOLP Output Ground Bounce
|
Original
|
PDF
|
SN74LVC861A
10-BIT
SCAS309I
000-V
A114-A)
A115-A)
OEBS74LVC2G53
scyb014
scyb005
|
Untitled
Abstract: No abstract text available
Text: SN54AHC123A, SN74AHC123A DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS SCLS352H − JULY 1997 − REVISED OCTOBER 2005 D Operating Range 2-V to 5.5-V VCC D Schmitt-Trigger Circuitry On A, B, and CLR SN54AHC123A . . . J OR W PACKAGE SN74AHC123A . . . D, DB, DGV, N, OR PW PACKAGE
|
Original
|
PDF
|
SN54AHC123A,
SN74AHC123A
SCLS352H
SN54AHC123A
SN74AHC123A
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: BurrĆBrown Products from Texas Instruments PCM3002 PCM3003 SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004 16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS FEATURES • • • • • • • • • Monolithic 20-Bit ∆Σ ADC and DAC 16/20-Bit Input/Output Data
|
Original
|
PDF
|
PCM3002
PCM3003
SBAS079A
16/20-BIT
20-Bit
PCM3003
PCM3002,
PCM3003)
|
Untitled
Abstract: No abstract text available
Text: SN75185 MULTIPLE RSĆ232 DRIVERS AND RECEIVERS SLLS181C − DECEMBER 1994 − REVISED OCTOBER 2003 D Single Chip With Easy Interface Between D D D D DB, DW, OR N PACKAGE TOP VIEW UART and Serial-Port Connector of IBM PC/AT and Compatibles Meets or Exceeds the Requirements of
|
Original
|
PDF
|
SN75185
RS232
SLLS181C
TIA/EIA-232-F
RS-232
SN75C185
SN751
|
Untitled
Abstract: No abstract text available
Text: SN74LVCC3245A OCTAL BUS TRANSCEIVER WITH ADJUSTABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS www.ti.com SCAS585O – NOVEMBER 1996 – REVISED MARCH 2005 FEATURES • • • • • DB, DBQ, DW, NS, OR PW PACKAGE TOP VIEW Bidirectional Voltage Translator 2.3 V to 3.6 V on A Port and 3 V to 5.5 V on B
|
Original
|
PDF
|
SN74LVCC3245A
SCAS585O
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN54ABT823, SN74ABT823 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS158E – JANUARY 1991 – REVISED MAY 1997 D D D D D D SN54ABT823 . . . JT OR W PACKAGE SN74ABT823 . . . DB, DW, OR NT PACKAGE TOP VIEW OE 1D 2D 3D 4D 5D 6D 7D 8D 9D CLR GND These 9-bit flip-flops feature 3-state outputs
|
Original
|
PDF
|
SN54ABT823,
SN74ABT823
SCBS158E
MIL-STD-883,
JESD-17
32-mA
64-mA
sdyu001x
sgyc003d
|
Untitled
Abstract: No abstract text available
Text: BurrĆBrown Products from Texas Instruments PCM1794 SLES080B – MAY 2003 – REVISED NOVEMBER 2003 24ĆBIT, 192ĆkHz SAMPLING, ADVANCED SEGMENT, AUDIO STEREO DIGITALĆTOĆANALOG CONVERTER FEATURES D Dual-Supply Operation: D 24-Bit Resolution D Analog Performance:
|
Original
|
PDF
|
PCM1794
SLES080B
24BIT,
192kHz
24-Bit
28-Lead
|
Untitled
Abstract: No abstract text available
Text: SN54AHCT373, SN74AHCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS239M – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A
|
Original
|
PDF
|
SN54AHCT373,
SN74AHCT373
SCLS239M
000-V
A114-A)
A115-A)
SN54AHCT373
SN74AHCT373
|