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    Untitled

    Abstract: No abstract text available
    Text: |U |I C R O N 128K X M T 58C 1289 9 S Y N C H R O N O U S SRAM 128K x 9 SRAM SYNCHRONOUS SRAM FULLY REGISTERED INPUTS AND OUTPUTS FEATURES PIN ASSIGNMENT Top View T im ing specific to SPARC m icroprocessor Fast cycle times: 12,16.6 and 20ns Fast clock to d ata valid: 6, 8 and 10ns


    OCR Scan     		PDF 32-Pin access/12ns access/16 access/20ns MT58C1289 T58C1289 MT5BC12B9

    synchronous sram

    Abstract: 05t cr
    Text: MICRO N T E C H N O L O G Y INC S5E D M IC R O N • b i l l 54*1 D D D 3 b 3 T 7T2 « M R N 128K X MT58C1289 9 SYNCHRONOUS SRAM 128K X 9 SRAM SYNCHRONOUS SRAM FULLY REGISTERED INPUTS AND OUTPUTS FEATURES Timing specific to SPARC microprocessor Fast access times: 16.6 and 20ns


    OCR Scan     		PDF MT58C1289 32-Pin MT6BC1289 MT56C1289 synchronous sram 05t cr