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    NRZI MODEM Search Results

    NRZI MODEM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CS-DSNULW19FF-005 Amphenol Cables on Demand Amphenol CS-DSNULW19FF-005 DB9 Female to DB9 Female Null Modem Cable - Double Shielded - No Handshaking 5ft Datasheet
    CS-DSNULW29MF-005 Amphenol Cables on Demand Amphenol CS-DSNULW29MF-005 DB9 Male to DB9 Female Null Modem Cable - Double Shielded - Full Handshaking 5ft Datasheet
    CS-DSNULW19MF-010 Amphenol Cables on Demand Amphenol CS-DSNULW19MF-010 DB9 Male to DB9 Female Null Modem Cable - Double Shielded - No Handshaking 10ft Datasheet
    CS-DSNULW19MF-025 Amphenol Cables on Demand Amphenol CS-DSNULW19MF-025 DB9 Male to DB9 Female Null Modem Cable - Double Shielded - No Handshaking 25ft Datasheet
    CS-DSNULW19FF-010 Amphenol Cables on Demand Amphenol CS-DSNULW19FF-010 DB9 Female to DB9 Female Null Modem Cable - Double Shielded - No Handshaking 10ft Datasheet

    NRZI MODEM Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: SL2002 * DUAL CHANNEL NRZI ENCODER / DECODER ^PRELIMINARY PIN CONFIGURATION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ Two independent Digital Phase Lock Loop circuits Two independent Full Duplex channels NRZI Encoder/Decoder DPLL runs off 16x clock Crystal o rT T L clock inputs for DPLL


    OCR Scan     		SL2002 16xCLK-OUT 4160-B PDF

    8273 dma controller

    Abstract: Intel 8080 interface Intel 8080 CPU Diagram intel 8085 clock 8085 intel SDLC PROTOCOL intel 8273 8273
    Text: in te 1 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible Programmable NRZI Encode/Decode HDLC/SDLC Compatible Two Programmable Modem Control Ports Full Duplex, Half Duplex, or Loop SDLC Operation Digital Phase Locked Loop Clock Recovery


    OCR Scan     		21047M 8273 dma controller Intel 8080 interface Intel 8080 CPU Diagram intel 8085 clock 8085 intel SDLC PROTOCOL intel 8273 8273 PDF

    8086 8257 DMA controller interfacing

    Abstract: interfacing of 8257 with 8086 IC KD 2107 6 PIN 8257 DMA controller intel DMA controller Unit for 80186 8273 dma controller interfacing of 8257 devices with 8085 i8273
    Text: in te i 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible Programmable NRZI Encode/Decode HDLC/SDLC Compatible Two Programmable Modem Control Ports Full Duplex, Half Duplex, or Loop SDLC Operation Digital Phase Locked Loop Clock Recovery


    OCR Scan     		PDF

    nrzi to nrz circuit diagram

    Abstract: SL2002 Logicstar
    Text: SL2002*. DUAL CHANNEL NRZI ENCODER / DECODER J Ü É 3L1M IN A R Y FEATURES PIN CONFIGURATION • Two in d e p e n d e n t D ig ita l Phase Lock Loop c irc u its ■ Two in d ep e nd e nt Full D uplex channels ■ NRZI E n c o d e r/D e co d e r ■ D PLL runs o ff 16x clo ck


    OCR Scan     		SL2002* 16xCLK-OUT 16x-CLK 4160-B nrzi to nrz circuit diagram SL2002 Logicstar PDF

    8086 8257 DMA controller interfacing

    Abstract: interfacing of 8257 with 8086 intel 8257 interrupt controller GA27-3093 Intel 8257 intel d 8273 intel 8273 8273 dma controller 8086 8257 DMA controller MCS-80
    Text: in te i 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible Programmable NRZI Encode/Decode HDLC/SDLC Compatible Two Programmable Modem Control Ports Full Duplex, Half Duplex, or Loop SDLC Operation Digital Phase Locked Loop Clock Recovery


    OCR Scan     		PDF

    Intel 8080 CPU Diagram

    Abstract: intel 8273 IBM 8080 Intel 8080 block Diagram intel 8085 a hdlc sdlc chip intel 8080 architecture intel 8085 MCS intel 8080 MCS intel 8085 clock
    Text: in le l 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible Programmable NRZI Encode/Decode HDLC/SDLC Compatible Two Programmable Modem Control Ports Full Duplex, Half Duplex, or Loop SDLC Operation Up to 64K Baud Synchronous Transfers Automatic FCS CRC Generation and


    OCR Scan     		PDF

    8086 8257 DMA controller interfacing

    Abstract: interfacing of 8257 with 8086 8273 dma controller interfacing of 8257 devices with 8085 8086 8257 DMA controller intel 8257 intel 8080 architecture intel 8273 GA27-3093 8228 DI
    Text: in t e i 8273, 8273-4, 8273-8 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER • CCITT X.25 Compatible ■ Programmable NRZI Encode/Decode ■ HDLC/SDLC Compatible ■ Two User Programmable Modem Control Ports ■ Full Duplex, Half Duplex, or Loop SDLC Operation


    OCR Scan     		150pF AFN-00743B AFN-00743B 8086 8257 DMA controller interfacing interfacing of 8257 with 8086 8273 dma controller interfacing of 8257 devices with 8085 8086 8257 DMA controller intel 8257 intel 8080 architecture intel 8273 GA27-3093 8228 DI PDF

    Untitled

    Abstract: No abstract text available
    Text: in te i 82588 HIGH INTEGRATION LOCAL AREA NETWORK CONTROLLER Integrates ISO Layers 1 and 2 — CSMA/CD Medium Access Control MAC — On-Chip Manchester, NRZI Encoding/Decoding — On-Chip Logic Based Collision Detect and Carrier Sense 2 Clocks per Data Transfer


    OCR Scan     		PDF

    tda 2023

    Abstract: constant time delay fm transmitter dip RR15 WR10 nrzi
    Text: Z8531 ASCC Asynchronous Serial Communications Controller Product Specification Zilog April 1985 • Two independent, 0 to 1M bit/second, fullduplex channels, each with a separate crystal oscillator and b a u d rate generator. ■ Program m able for NRZ, NRZI, or FM data


    OCR Scan     		Z8531 44-pin Z8531A 40-pin Z8531ACS tda 2023 constant time delay fm transmitter dip RR15 WR10 nrzi PDF

    Z8000

    Abstract: WR0-WR15 rx6b
    Text: Asynchronous Serial Communications Controller Features • Two independent, 0 to 1M bit/second, full-duplex channels, each with a separate crystal oscillator and baud rate generator. ■ Programmable ior NRZ, NRZI, of FM data encoding. ■ Local Loopback and Auto Echo modes.


    OCR Scan     		Z8031 Z8031A Z8000 WR0-WR15 rx6b PDF

    82588

    Abstract: ti5a manchester differential T28-F 2T24 8T24 CRC-16 CRC-32 7t53 intel 8282
    Text: 82588 HIGH INTEGRATION LOCAL AREA NETWORK CONTROLLER in te i Integrates ISO Layers 1 and 2 — CSMA/CD Medium Access Control MAC — On-Chip Manchester, NRZI Encoding/Decoding — On-Chip Logic Based Collision Detect and Carrier Sense • 2 Clocks per Data Transfer


    OCR Scan     		K-T63 82588 ti5a manchester differential T28-F 2T24 8T24 CRC-16 CRC-32 7t53 intel 8282 PDF

    CDIP-40

    Abstract: IR receiver TK 19 544 BD6N CDIP40 PDIP40 PLCC44 RR15 S55S TDA 558 Z8531
    Text: f Z 7 SG STHO M SO N Ä 7# Z8531 ASYNCHRONOUS SERIAL COMMUNICATIONS CONTROLLER • TW O INDEPENDENT, 0 TO 1M BIT/SECOND, FULL-DUPLEX CHANNELS, EACH WITH A SE­ PARATE CRYSTAL OSCILLATOR AND BAUD RATE GENERATOR ■ PROGRAMM ABLE FOR NRZ, NRZI, OR FM DATA ENCODING


    OCR Scan     		Z8531 Z8531 PDIP-40 Z8531C1V PLCC44 Z8531AC1V Z8531C6V CDIP-40 IR receiver TK 19 544 BD6N CDIP40 PDIP40 PLCC44 RR15 S55S TDA 558 PDF

    manchester differential

    Abstract: T75A cd controller
    Text: intei 82588 HIGH INTEGRATION LOCAL AREA NETWORK CONTROLLER Integrates ISO Layers 1 and 2 — CSMA/CD Medium Access Control MAC — On-Chip Manchester, NRZI Encoding/Decoding — On-Chip Logic Based Collision Detect and Carrier Sense • 2 Clocks per Data Transfer


    OCR Scan     		PDF

    IR receiver TK 19 544

    Abstract: CDIP40 z8531p CDIP-40 TDA 558 TDA 2.1 chanel
    Text: *t 7 SGS-THOMSON Z8531 H Q g i iL iC T i( 2 iO © S ASYNCHRONOUS SERIAL COMMUNICATIONS CONTROLLER TW O INDEPENDENT, 0 TO 1M BIT/SECOND, FULL-DUPLEX CHANNELS, EACH WITH A SE­ PARATE CRYSTAL OSCILLATOR AND BAUD RATE GENERATOR PROGRAMM ABLE FOR NRZ, NRZI, OR FM


    OCR Scan     		Z8531 PDIP40 DIP40 PLCC44 Z8531 Z8531D2N PDIP-40 IR receiver TK 19 544 CDIP40 z8531p CDIP-40 TDA 558 TDA 2.1 chanel PDF

    Untitled

    Abstract: No abstract text available
    Text: Z8031 Z8000 Z-ASCC Asynchronous Serial Communications Controller •7 j I ¿ ■ l lO C J Product Specification April 1985 ■ Two independent, 0 to 1M bit/second, fullduplex channels, each with a separate crystal oscillator and baud rate generator. ■ Programmable for NRZ, NRZI, or FM data


    OCR Scan     		Z8031 Z8000Â Z8031A 40-pin Z8031AVS Z8031ACS PDF

    Untitled

    Abstract: No abstract text available
    Text: Z8531 ASCG Asynchronous Serial Communications Controller Product Specification Zilog A pril 1985 • Program m able for NRZ, NRZI, or FM data encoding. I A synchronous com m unications with five to eight bits p e r ch ara cte r a n d one, one and one-half, or two stop bits per ch aracter; p ro ­


    OCR Scan     		Z8531 Z8531A 40-pin Z8531AVS Z8531ACS PDF

    Untitled

    Abstract: No abstract text available
    Text: rZ T ^ 7# S G S -T H O M S O N Z 8531 ASYNCHRONOUS SERIAL COMMUNICATIONS CONTROLLER . TW O INDEPENDENT, 0 TO 1M BIT/SECOND, FULL-DUPLEX CHANNELS, EACH WITH A SE­ PARATE CRYSTAL O SCILLATOR AND BAUD RATE GENERATOR • PRO GRAMM ABLE FOR NRZ, NRZI, OR FM DATA ENCODING


    OCR Scan     		Z8531 PDIP-40 PLCC44 PDF

    SOTDMA

    Abstract: vhf gmsk receiver AIS marine receiver AIS vhf gmsk IEC 61993-2 limiter-discriminator CMX7032 vhf gmsk VHF marine receiver CMX7042
    Text: Product Preview CMX7032 / CMX7042 AIS Data Processor PP/703242/2 Marine AIS data processor designed for Limiter-Discriminator based RF systems Features • • • • • • • • • • • • • Applications Half-Duplex GMSK and FSK Modem • Automatic Identification System AIS for


    Original     		CMX7032 CMX7042 PP/703242/2 10bit) SOTDMA vhf gmsk receiver AIS marine receiver AIS vhf gmsk IEC 61993-2 limiter-discriminator vhf gmsk VHF marine receiver CMX7042 PDF

    media converter circuit diagram

    Abstract: nrzi circuit diagram MLT-3 nrzi encoder audio video transmitter over twisted pair nrzi nrzi to nrz converter circuit diagram mlt resistor ethernet serial converter media converter optical fibre DM9301
    Text: DM9301 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter General Description The DM9301 is a physical-layer, single-chip, lowpower media converter for 100BASE-TX/FX full duplex repeater applications. On the TX media side, it provides a direct interface to Unshielded Twisted


    Original     		DM9301 100Mbps DM9301 100BASE-TX/FX 100BASE-TX CA94086, DM9301-DS-F02 media converter circuit diagram nrzi circuit diagram MLT-3 nrzi encoder audio video transmitter over twisted pair nrzi nrzi to nrz converter circuit diagram mlt resistor ethernet serial converter media converter optical fibre PDF

    Untitled

    Abstract: No abstract text available
    Text: DM9301FP 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter General Description recovery circuits to minimize bit delay through the converter no FIFO is used to buffer data between the FX and TX interfaces . Furthermore, due to the excellent rise/fall time control by a built-in waveshaping filter, the DM9301FP needs no external filter


    Original     		DM9301FP 100Mbps DM9301FP 100Base-TX 100BASE-TX/FX 100BASE-TX DM9301FP-DS-F03 PDF

    Untitled

    Abstract: No abstract text available
    Text: DM9301 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter General Description recovery circuits to minimize bit delay through the converter no FIFO are used to buffer data between the FX and TX interfaces . Furthermore, due to the excellent rise/fall time control by a built-in waveshaping filter, the DM9301 needs no external filter to


    Original     		DM9301 100Mbps DM9301 100Base-TX 100BASE-TX/FX 100BASE-TX CA94085, DM9301-DS-F02 PDF

    Untitled

    Abstract: No abstract text available
    Text: DM9301FP 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter General Description recovery circuits to minimize bit delay through the converter no FIFO is used to buffer data between the FX and TX interfaces . Furthermore, due to the excellent rise/fall time control by a built-in waveshaping filter, the DM9301FP needs no external filter


    Original     		DM9301FP 100Mbps DM9301FP 100Base-TX 100BASE-TX/FX 100BASE-TX DM9301FP-DS-F03 PDF

    nrzi to nrz circuit diagram

    Abstract: nrzi circuit diagram MLT-3 PE68551 media converter circuit diagram mlt resistor parallel scrambler davicom ethernet 100BASE-FX DM9301 DM9301F
    Text: DM9301 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter General Description The DM9301 is a physical-layer, single-chip, lowpower media converter for 100BASE-TX/FX full duplex repeater applications. On the TX media side, it provides a direct interface to Unshielded Twisted


    Original     		DM9301 100Mbps DM9301 100BASE-TX/FX 100BASE-TX CA94085, DM9301-DS-F02 nrzi to nrz circuit diagram nrzi circuit diagram MLT-3 PE68551 media converter circuit diagram mlt resistor parallel scrambler davicom ethernet 100BASE-FX DM9301F PDF

    media converter circuit diagram

    Abstract: nrzi to nrz converter circuit diagram E1 to fiber optic converter circuit MLT 22 525 V23812 digital clock ckt diagram Tx/Fx Media Converter media converter optical fibre nrzi mlt resistor
    Text: DM9301FP 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter General Description recovery circuits to minimize bit delay through the converter no FIFO is used to buffer data between the FX and TX interfaces . Furthermore, due to the excellent rise/fall time control by a built-in waveshaping filter, the DM9301FP needs no external filter


    Original     		DM9301FP 100Mbps DM9301FP 100Base-TX 100BASE-TX/FX 100BASE-TX DM9301FP-DS-F03 media converter circuit diagram nrzi to nrz converter circuit diagram E1 to fiber optic converter circuit MLT 22 525 V23812 digital clock ckt diagram Tx/Fx Media Converter media converter optical fibre nrzi mlt resistor PDF