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    P181 IC Search Results

    P181 IC Result Highlights (5)

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    D1U74T-W-1600-12-HB4AC Murata Manufacturing Co Ltd AC/DC 1600W, Titanium Efficiency, 74 MM , 12V, 12VSB, Inlet C20, Airflow Back to Front, RoHs Visit Murata Manufacturing Co Ltd
    D1U54T-M-2500-12-HB4C Murata Manufacturing Co Ltd 2.5KW 54MM AC/DC 12V WITH 12VDC STBY BACK TO FRONT AIR Visit Murata Manufacturing Co Ltd
    MHM411-21 Murata Manufacturing Co Ltd Ionizer Module, 100-120VAC-input, Negative Ion Visit Murata Manufacturing Co Ltd
    SCL3400-D01-1 Murata Manufacturing Co Ltd 2-axis (XY) digital inclinometer Visit Murata Manufacturing Co Ltd
    SCC433T-K03-004 Murata Manufacturing Co Ltd 2-Axis Gyro, 3-axis Accelerometer combination sensor Visit Murata Manufacturing Co Ltd

    P181 IC Datasheets Context Search

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    P181

    Abstract: P181 G P180 MW187 tr5vdc
    Text: /1 6 4.8mm »SNÄPHIN PANEL MOUNT LEDs COLOR CODE LEGEND PART NUMBER SELECTION GUIDE r LENS CHARACTERISTICS CODE (SEE LEGEND SINGLE CHIP P181 P187 LED COLOR CHARACTERISTICS ELECTRICAL CHARACTERISTICS COLOR CODE TR5 TY5 TG5 LENS CHARACTERISTICS OPTIONS T-W IR E TERMINAL


    OCR Scan     		12VAC P180-W P181-W P181-T P187-W P187-T S4E37GS MC187 MW187 P181 P181 G P180 MW187 tr5vdc PDF

    p181 4 pin

    Abstract: 511000 dram S511000 TC 511000
    Text: MOSEL_MS511000 may isso 1,048,576 x 1 Fast Page Mode CMOS Dynamic RAM FEATURES GENERAL DESCRIPTION • Available in 70/80/100/120 ns The M O SEL M S511000 is a CM OS dynam ic RAM organized as 1,048,576 w ords x 1 bit. The M S511000 has been designed for m ainfram e, buffer memory,


    OCR Scan     		S511000 PID0061 MS511000 MS511000-70PC MS511000-70SC MS511000-70ZC MS511000-80PC MS511000-80SC MS511000-80ZC p181 4 pin 511000 dram TC 511000 PDF

    P331

    Abstract: p181 P086 p323 P085 P237 p044 p055 P084 P005
    Text: 5 6 7 GND UVCC3 GND VCC3C GND 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 VSS5 MD_2 MD_1 X0 X1 VSS5 X1A X0A MD_0 P16_1/PPG9 P16_0/PPG8 P20_6/SCK3/FRCK3 P20_5/SOT3 P20_4/SIN3 P20_2/SCK2/FRCK2 P20_1/SOT2 P20_0/SIN2 P24_7/INT7


    Original     		2/AN10 3/AN11 4/AN12 4/SDA0/INT14 PB-91464A-NLS-100PMC PB-91464A-NLS-100PMC P331 p181 P086 p323 P085 P237 p044 p055 P084 P005 PDF

    Untitled

    Abstract: No abstract text available
    Text: MOSEL M S511000 1,048,576 x 1 Fast Page Mode CMOS Dynamic RAM F E A TU R ES G E N E R A L D E S C R IP TIO N • Available in 70/80/100/120 ns The MOSEL MS511000 is a CMOS dynamic RAM organized as 1,048,576 words x 1 bit. The MS511000 has been designed for mainframe, buffer memory,


    OCR Scan     		S511000 MS511000 MS511000 MS511000-70PC P18-1 MS511000-70SC S26-1 MS511000-70ZC Z20-1 PDF

    p181 4 pin

    Abstract: MS511000-12PC p181 MS511000-10 MS511000-12 MS511000-70 MS511000-80 S511000-70 S5110 S511000
    Text: M OSEL M S511000 1,048,576 x 1 Fast Page Mode CMOS Dynamic RAM FEATURES G E N E R A L D E S C R IP T IO N • Available in 70/80/100/120 ns The M O SEL M S 511000 is a CM O S dynam ic RAM organized as 1,048,576 words x 1 bit. The M S 511000 has been designed for m ainfram e, buffer memory,


    OCR Scan     		MS511000 MS511000 PID0061 MS511000-70PC P18-1 MS511000-70SC S26-1 MS511000-70ZC p181 4 pin MS511000-12PC p181 MS511000-10 MS511000-12 MS511000-70 MS511000-80 S511000-70 S5110 S511000 PDF

    P181 G

    Abstract: DRAM 511000-70 ss1891 p181 4 pin 511000-70
    Text: MOSEL M S511000 1,048,576 x 1 Fast Page Mode CMOS Dynamic RAM FEATURES GENERAL DESCRIPTION • Available in 70/80/100/120 ns The MOSEL MS511000 is a CMOS dynamic RAM organized as 1,048,576 words x 1 bit. The MS511000 has been designed for mainframe, buffer memory,


    OCR Scan     		S511000 MS511000 PID0061 MS511000 MS511000-70PC MS511000-70SC MS511000-70ZC MS511000-80PC MS511000-80SC P181 G DRAM 511000-70 ss1891 p181 4 pin 511000-70 PDF

    IDT72401

    Abstract: IDT72402 IDT72403 IDT72404
    Text: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4 and 64 x 5 Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • First-ln/First-Out Dual-Port memory 64 x 4 organization IDT72401/72403


    Original     		IDT72401 IDT72402 IDT72403 IDT72404 IDT72401/72403) IDT72402/72404) 175mW 45MHz IDT72403/72404 MIL-STD-883, IDT72401 IDT72402 IDT72403 IDT72404 PDF

    Untitled

    Abstract: No abstract text available
    Text: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4 and 64 x 5 IDT72404 are asynchronous high-performance First-ln/First-Out memories organized as 64 words by 5 bits. The IDT72403 and IDT72404 also have an Output Enable OE pin. The FlFOs accept 4-bit or 5-bit data at the data input


    Original     		IDT72401 IDT72402 IDT72403 IDT72404 IDT72404 IDT72403 IDT72402 PDF

    IDT72401

    Abstract: IDT72402 IDT72403 IDT72404 300 mil, D18-1 IDT
    Text: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4 and 64 x 5 Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • First-ln/First-Out Dual-Port memory 64 x 4 organization IDT72401/72403


    Original     		IDT72401 IDT72402 IDT72403 IDT72404 IDT72401/72403) IDT72402/72404) 175mW 45MHz IDT72403/72404 MIL-STD-883, IDT72401 IDT72402 IDT72403 IDT72404 300 mil, D18-1 IDT PDF

    Untitled

    Abstract: No abstract text available
    Text: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4 and 64 x 5 IDT72404 are asynchronous high-performance First-ln/First-Out memories organized as 64 words by 5 bits. The IDT72403 and IDT72404 also have an Output Enable OE pin. The FlFOs accept 4-bit or 5-bit data at the data input


    Original     		IDT72401 IDT72402 IDT72403 IDT72404 IDT72401/72403) IDT72402/72404) 175mW 45MHz IDT72403/72404 MlL-STD-883, PDF

    MOSFET P239

    Abstract: XC4000XLA VDR P275 L20 P55 MOSFET XC4000E XC4000X XC4000XL XC4000XV XC4013XLA XC4028XLA
    Text: XC4000XLA/XV Field Programmable Gate Arrays R February 1, 1999 Version 1.0 6* Product Specification XC4000XLA/XV Family FPGAs XC4000XLA/XV Electrical Features Note: XC4000XLA devices are improved versions of XC4000XL devices. The XC4000XV devices have the


    Original     		XC4000XLA/XV XC4000XLA/XV XC4000XLA XC4000XL XC4000XV XC4000E XC4000X MOSFET P239 VDR P275 L20 P55 MOSFET XC4013XLA XC4028XLA PDF

    J29 P190

    Abstract: p331 TRANSISTOR p477 p525 P364 P521 G P440 C 05 P521 G2 p372 transistor P519
    Text: MSX Family Data Sheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor


    Original     		PDF

    P521 FAIRCHILD

    Abstract: J29 P190 P211A11 fairchild AG12 diode fairchild Ah7 FAIRCHILD AB29 transistor P421 fairchild AJ23 P449 P315 transistor
    Text: MSX Family Datasheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: CMOS PARALLEL FIFO 64 x 4 and 64 x 5 FEATURES: • • • • • • • • • • • • • • • • • First-In/First-Out Dual-Port memory 64 x 4 organization IDT72401/72403 64 x 5 organization (IDT72402/72404) RAM-based FIFO with low fall-through time


    OCR Scan     		IDT72401 IDT72402 IDT72403 IDT72404 IDT72401/72403) IDT72402/72404) 175mW 45MHz IDT72403/72404 MIL-STD-883, PDF

    Untitled

    Abstract: No abstract text available
    Text: CMOS PARALLEL FIFO 64 x 4 and 64 x 5 | dt Integrated D evize Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • First-In/First-Out D ual-Port mem ory 64 x 4 organization ID T72401/72403) 64 x 5 organization (ID T72402/72404)


    OCR Scan     		T72401/72403) T72402/72404) IDT72403/72404 MIL-STD-883, P16-1 D16-1 S016-1 P18-1 D18-1 S018-1 PDF

    P132-P134

    Abstract: p331 TRANSISTOR P452
    Text: MSX Family Data Sheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor


    Original     		PDF

    aw7 TRANSISTOR

    Abstract: P449 I-CUBE iq P-033 Bus repeater p426 P-238 P122-P120 p331 TRANSISTOR P339
    Text: MSX Family Data Sheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor


    Original     		PDF

    11AK12

    Abstract: 4062XLA Trans Metrics P100 4044XL AD 690 xilinx HQ240 diode ak14
    Text: £ X IU N X XC4000XLA/XV Field Programmable Gate Arrays February 1, 1999 Version 1.0 Product Specification XC4000XLA/XV Family FPGAs XC4000XLA/XV Electrical Features Note: XC 4000XLA devices are improved versions of X C 4000X L devices. The XC4000X V devices have the


    OCR Scan     		XC4000XLA/XV 4000XLA 4000X XC4000X XC4000E 11AK12 4062XLA Trans Metrics P100 4044XL AD 690 xilinx HQ240 diode ak14 PDF

    xc4005 pg156

    Abstract: P181 Japan X6569 X5326 708 p113 XC4013 PG223 XC4005PG156 metal film resistors n4 150C 3b365 k1168
    Text: XC4000 High-Reliability Logic Cell Array Family  March 1997 version 1.0 Product Description Features Description • Available in Class B fully compliant and military temperature range only versions – MIL-STD-883 Class B processing complies with paragraph 1.2.1


    Original     		XC4000 MIL-STD-883 Sub-91 xc4005 pg156 P181 Japan X6569 X5326 708 p113 XC4013 PG223 XC4005PG156 metal film resistors n4 150C 3b365 k1168 PDF

    transistor P397

    Abstract: P521 G P089 P521 FAIRCHILD transistor P479 MSX532 MSX532TB792 P039 UP501 P449
    Text: Revised June 2002 MSX532 532 Port Digital Crosspoint Switch with LVTTL I/O’s General Description Features The MSX family of SRAM-based bit-oriented switching devices offer flow-through NRZ data rates of up to 150Mb/s and registered clock frequencies of up to 75MHz. The I/O


    Original     		MSX532 150Mb/s 75MHz. transistor P397 P521 G P089 P521 FAIRCHILD transistor P479 MSX532 MSX532TB792 P039 UP501 P449 PDF

    diagram of ic p181

    Abstract: P181 BL 712 P181 050 P181
    Text: CMOS PARALLEL FIFO 64 x 4 and 64 x 5 FEATURES: • • • • • • • • • • • • • • • • • First-In/First-Out Dual-Port memory 64 x 4 organization IDT72401/72403 64 x 5 organization (IDT72402/72404) RAM-based FIFO with low fall-through time


    OCR Scan     		IDT72401 IDT72402 IDT72403 IDT72404 IDT72401/72403) IDT72402/72404) 175mW 45MHz IDT72403/72404 MIL-STD-883, diagram of ic p181 P181 BL 712 P181 050 P181 PDF

    ptc j29 p190

    Abstract: elex 15101 datasheet str 5707 intel 865 MOTHERBOARD pcb CIRCUIT diagram str 5707 pci pcb layout vhdl code for 8-bit parity generator XCS40PQ208 machine maintenance checklist CD 5888
    Text: Xilinx PCI the CORE of a GREAT IDEA The Programmable Logic CompanySM Printed in U.S.A. Data Book 2100 Logic Drive San Jose, CA 95124-3400 Tel: 1-408-559-7778 Fax: 1-408-559-7114 e-mail: hotline@xilinx.com web: www.xilinx.com PN 0401764 5/98 Xilinx PCI The


    Original     		XC2064, XC3090, XC4005, XC-DS501, ptc j29 p190 elex 15101 datasheet str 5707 intel 865 MOTHERBOARD pcb CIRCUIT diagram str 5707 pci pcb layout vhdl code for 8-bit parity generator XCS40PQ208 machine maintenance checklist CD 5888 PDF

    dt72401

    Abstract: No abstract text available
    Text: C M O S P A R A L L E L FI FO 64 x 4 and 64 x 5 FEATURES: • • • • • • • • • • F irst-In /F irst-O u t D u a l-P o rt m e m o ry 6 4 x 4 o rg a n iza tio n ID T 7 2 4 0 1/72403 6 4 x 5 o rg a n iza tio n (ID T 7 2 4 0 2 /7 2 4 0 4 ) R A M -b a s e d F IF O w ith lo w ta il-th ro u g h tim e


    OCR Scan     		IDT72401 IDT72402 IDT72403 IDT72404 P18-1 D18-1 P16-1 D16-1 dt72401 PDF

    transistor P397

    Abstract: transistor P479 P449 p331 TRANSISTOR transistor k38 v6 transistor P519 am2 am3 p055 power transistor f AJ38 w38 transistor
    Text: MSX532 Matrix Switch Preliminary Data Sheet Features Description • • The MSX family of SRAM-based bit-oriented switching devices offers flow-through NRZ datarates of 300Mbps and registered clock frequencies of 200MHz. The 532 I/O Buffers IOBs are individually configured. The IOBs can be connected


    Original     		MSX532 200MHz 300Mbps MKT-MSX532-DS transistor P397 transistor P479 P449 p331 TRANSISTOR transistor k38 v6 transistor P519 am2 am3 p055 power transistor f AJ38 w38 transistor PDF