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    PEEL GATE ARRAY LOGIC Search Results

    PEEL GATE ARRAY LOGIC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    DCL541A01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: Low / Input disable Visit Toshiba Electronic Devices & Storage Corporation
    DCL542H01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=2:2) / Default Output Logic: High / Output enable Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation

    PEEL GATE ARRAY LOGIC Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    22CV10

    Abstract: 22CV10A PAL22V10 PEEL22LV10AZJ-25 PEEL22LV10AZP-25 PEEL22LV10AZS-25 PEEL22LV10AZT-25
    Text: PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc = 5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A) - 5 Volt tolerant inputs and I/O’s


    Original     		22LV10AZ 22CV10 22CV10A PAL22V10 PEEL22LV10AZJ-25 PEEL22LV10AZP-25 PEEL22LV10AZS-25 PEEL22LV10AZT-25 PDF

    PEEL18CV8P-15

    Abstract: PEEL18CV8S-7
    Text: Not recommended for New designs contact factory for availability PEEL 18CV8 -7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility - Enhanced architecture fits in more logic - 74 product terms x 36 input AND array


    Original     		18CV8 25MHz PEEL18CV8P-15 PEEL18CV8S-7 PDF

    PEEL18CV8P-15

    Abstract: PEEL18CV8J-10 PEEL18CV8P 18CV8 PEEL18CV8P-25L PEEL18CV PEEL18CV8J-25 PEEL18CV8JI-25 PEEL18CV8P-25 PEEL18CV8J-7
    Text: PEEL 18CV8 -7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility - Enhanced architecture fits in more logic - 74 product terms x 36 input AND array - 10 inputs and 8 I/O pins - 12 possible macrocell configurations


    Original     		18CV8 25MHz PEEL18CV8P-15 PEEL18CV8J-10 PEEL18CV8P PEEL18CV8P-25L PEEL18CV PEEL18CV8J-25 PEEL18CV8JI-25 PEEL18CV8P-25 PEEL18CV8J-7 PDF

    ICT 18CV8Z

    Abstract: ICT PEEL18CV8ZP-25 18CV8Z-25 16V8 18CV8 PAL16V8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZJI-25
    Text: Commercial PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology - Superior factory testing


    Original     		18CV8Z-25 20-pin PEEL18CV8ZJ-25 PEEL18CV8ZS-25 PEEL18CV8ZT-25 PEEL18CV8ZPI-25 PEEL18CV8ZJI-25 ICT 18CV8Z ICT PEEL18CV8ZP-25 18CV8Z-25 16V8 18CV8 PAL16V8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZJI-25 PDF

    PAL16V8

    Abstract: 16V8 18CV8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZS-25 18CV8Z-25
    Text: PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology - Superior factory testing


    Original     		18CV8Z-25 20-pin PEEL18CV8ZJ-25 PEEL18CV8ZS-25 PEEL18CV8ZT-25 PEEL18CV8ZPI-25 PEEL18CV8ZJI-25 PAL16V8 16V8 18CV8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZS-25 18CV8Z-25 PDF

    18CV8

    Abstract: PEEL18CV8J-7 PEEL18CV8P-7 PEEL18CV8S-7 PEEL18CV8P-10
    Text: PEEL 18CV8 -7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • Multiple Speed Power, Temperature Options - VCC = 5 Volts ±10% - Speeds ranging from 7ns to 25 ns - Power as low as 37mA at 25MHz - Commercial and industrial versions available


    Original     		18CV8 25MHz 20-pin PEEL18CV8J-7 PEEL18CV8P-7 PEEL18CV8S-7 PEEL18CV8P-10 PDF

    18cv8z-25

    Abstract: PEELTM18CV8Z PEEL18CV8ZJI PEEL18CV8ZJI-25
    Text: Commercial PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology - Superior factory testing


    Original     		18CV8Z-25 PEEL18CV8ZP-25 PEEL18CV8ZJ-25 PEEL18CV8ZS-25 PEEL18CV8ZT-25 PEEL18CV8ZPI-25 PEEL18CV8ZJI-25 PEEL18CV8ZSI-25 PEEL18CV8ZTI-25 20-pin PEELTM18CV8Z PEEL18CV8ZJI PDF

    Untitled

    Abstract: No abstract text available
    Text: Commercial PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc = 5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)


    Original     		22LV10AZ 22V10 PEEL22LV10AZP-25 PEEL22LV10AZJ-25 PEEL22LV10AZS-25 PEEL22LV10AZT-25 24-pin 28-pin PDF

    22CV10

    Abstract: 22CV10A PAL22V10 PEEL22LV10AZJ-25 PEEL22LV10AZP-25 biomedical
    Text: PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc = 5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)


    Original     		22LV10AZ 22V10 PEEL22LV10AZP-25 24-pin PEEL22LV10AZJ-25 28-pin PEEL22LV10AZS-25 PEEL22LV10AZT-25 22CV10 22CV10A PAL22V10 PEEL22LV10AZJ-25 PEEL22LV10AZP-25 biomedical PDF

    22CV10

    Abstract: 22CV10A PAL22V10 PEEL22LV10AZJ-25 PEEL22LV10AZP-25 PEEL22LV10AZS-25
    Text: PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc = 5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A) - 5 Volt tolerant inputs and I/O’s


    Original     		22LV10AZ 22CV10 22CV10A PAL22V10 PEEL22LV10AZJ-25 PEEL22LV10AZP-25 PEEL22LV10AZS-25 PDF

    Untitled

    Abstract: No abstract text available
    Text: Commercial PEEL 18LV8Z -25 CMOS Programmable Electrically Erasable Logic Device Features • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc =5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)


    Original     		18LV8Z PEEL18LV8ZP-25 PEEL18LV8ZJ-25 PEEL18LV8ZS-25 PEEL18LV8ZT-25 20-pin PEELTM18LV8Z PDF

    PAL16V8

    Abstract: 18CV8Z PEEL18CV8ZJ-25
    Text: To Notfind recommended out if the package for New you designs need isavailable, contactcontact factoryCustomer for availability Service PEEL 18CV8Z -25 CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power Operation - Vcc = 5 Volts ±10%


    Original     		18CV8Z PAL16V8 PEEL18CV8ZJ-25 PDF

    18CV8

    Abstract: No abstract text available
    Text: Not recommended for New designs contact factory for availability PEEL 18CV8 -7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility - Enhanced architecture fits in more logic - 74 product terms x 36 input AND array


    Original     		18CV8 25MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: To Notfind recommended out if the package for New you designs need isavailable, contactcontact factoryCustomer for availability Service PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features Low Voltage, Ultra Low Power Operation


    Original     		22LV10AZ 22V10 PDF

    PAL16V8

    Abstract: 16V8 18CV8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZS-25 PEEL18CV8ZJ25 PEEL18CV8ZP-25L
    Text: PEEL 18CV8Z -25 CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz Architectural Flexibility - Enhanced architecture fits in more logic


    Original     		18CV8Z PAL16V8 16V8 18CV8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZS-25 PEEL18CV8ZJ25 PEEL18CV8ZP-25L PDF

    pal16v8

    Abstract: dec mer PEEL18CV8ZP-25L
    Text: ic PEEL 18CV8Z -25 CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz Architectural Flexibility - Enhanced architecture fits in more logic


    Original     		18CV8Z Pro1-9600 pal16v8 dec mer PEEL18CV8ZP-25L PDF

    ICT 18CV8

    Abstract: 18CV8 PEEL18CV8P-15 ICT 20 PIN PLASTIC 300 MIL DIP programmer EPLD 18cv8 programming free circuit eeprom programmer PEEL18CV PEEL18CV8J-5 PEEL18CV8P-7
    Text: Commercial/ Industrial PEEL 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • Multiple Speed Power, Temperature Options - VCC = 5 Volts ±10% - Speeds ranging from 5ns to 25 ns - Power as low as 37mA at 25MHz - Commercial and industrial versions available


    Original     		18CV8 25MHz 20-pin ICT 18CV8 PEEL18CV8P-15 ICT 20 PIN PLASTIC 300 MIL DIP programmer EPLD 18cv8 programming free circuit eeprom programmer PEEL18CV PEEL18CV8J-5 PEEL18CV8P-7 PDF

    18CV8

    Abstract: No abstract text available
    Text: -> GOULD CHIOSE*PLD Electrically ErasableProgrammableLogic PEEL 18CV8 Features • Synchronous preset, asynchronous clear • Independent output enables Advanced CMOS E2PROM Technology Application Versatility • Replace SSI/MSI logic • Emulates bipolar PAL™, GAL™ and the EPLDS


    OCR Scan     		18CV8 18CV8 PDF

    altera EP300

    Abstract: 18CV8 18cv8 programming altera ep 18cv8s 10391-D
    Text: GOULD SEMIC ONDU CTOR DIV 03E D | MDSSilti □□103S2 4055916 GOU LD S EM IC O N D U C T OR DIV -> GOULO Electronics 03E 10382 D CMOS e 2p l d Electrically Erasable Programmable Logic PEEL 18CV8 Features • Synchronous preset, asynchronous clear • Independent output enables


    OCR Scan     		103S2 18CV8 EP300/310 D25nS Ts015nS 20-Pin altera EP300 18CV8 18cv8 programming altera ep 18cv8s 10391-D PDF

    18CV8

    Abstract: 18CV825 18CV815 18cv8 programming 18CV8-15 HAS64 PEEL18CV8 AMI PEEL18CV8
    Text: AMI PEEL 18CV8 SEMICONDUCTORS February 1993 CMOS Programmable Electrically Erasable Logic Device General Description Features The AMI PEEL18CV8 is a CMOS Programmable Electrically Erasable Logic device that provides a highperformance, low-power, reprogrammable,


    OCR Scan     		18CV8 PEEL18CV8 18CV8 18CV825 18CV815 18cv8 programming 18CV8-15 HAS64 AMI PEEL18CV8 PDF

    18CV8

    Abstract: 18CV8-15 18CV815 ami equivalent gates 18CV825 PEEL18CV8
    Text: PEEL 18CV8 AMI SEMICONDUCTORS February 1993 CMOS Programmable Electrically Erasable Logic Device Features General Description The AMI PEEL18CV8 is a CMOS Programmable Electrically Erasable Logic device that provides a highperformance, low-power, reprogrammable,


    OCR Scan     		18CV8 PEEL18CV8 480Ki2 480KD 18CV8 18CV8-15 18CV815 ami equivalent gates 18CV825 PDF

    18CV825

    Abstract: PEEL18CV8 AMI 18CV8 18cv8 programming ami equivalent gates ami equivalent gates of each core cell PEEL18CV8 18CV8-15
    Text: PEEL 18CV8 AMI SEMICONDUCTORS CMOS Programmable Electrically Erasable Logic Device February 1993 General Description Features The AMI PEEL18CV8 is a CMOS Programmable Electrically Erasable Logic device that provides a highperformance, low-power, reprogrammable,


    OCR Scan     		18CV8 PEEL18CV8 464C2 480Kfi D014273 18CV825 PEEL18CV8 AMI 18CV8 18cv8 programming ami equivalent gates ami equivalent gates of each core cell 18CV8-15 PDF

    22V10PLD

    Abstract: 74ls74 timing setup hold PA7Q24
    Text: PA7024 PEEL Array mimi SEMICONDUCTORS February 1993 Features General Description User-Configurable High Density Logic Array The PA7024 is a user-configurable high-density Programmable Electrically Erasable Logic PEEL Array for creating multi-level, l/O-buried, logic circuits. Designed


    OCR Scan     		PA7024 24-pin 28-pin 22V10PLD 74ls74 timing setup hold PA7Q24 PDF

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Commercial PEEL 22LV10AZ-25 CMOS Programmable Electrically Erasable Logic Device FEATURES • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc =25 uA typical at standby - Icc = 2 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)


    OCR Scan     		22LV10AZ-25 22LV1OAZ PEEL22LV1 OAZP-25 24-pin PEEL22LV1OAZJ-25 28-pin PEEL22LV1OAZS-25 PEEL22LV1OAZT-25 PDF