SMD Transistor 9C
Abstract: smd transistor 8c 702 y smd TRANSISTOR GEC Plessey SL523 Logarithmic Amplifier detector SL521 SL523 SL523B SL523C log amplifier
Text: ADVANCE INFORMATION DS3607 - 2.0 SL523 100MHz DUAL WIDEBAND LOG AMPLIFIER The SL523B and C are wideband amplifiers for use in successive detection logarithmic IF strips operating at centre frequencies between 10 and 100MHz They are pin compatible with the SL521 series of logarithmic amplifiers and
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DS3607
SL523
100MHz
SL523B
SL521
SL523s
SMD Transistor 9C
smd transistor 8c
702 y smd TRANSISTOR
GEC Plessey SL523
Logarithmic Amplifier detector
SL523
SL523C
log amplifier
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10h131
Abstract: SP9131DG SP9131 mc10131 pin compatible with PLESSEY
Text: d Ë J 7250513 D00b7Sl H | ~ PLESSEY SEMICONDUCTORS TS 7220513 PLESSEY SEMICONDUCTORS 95D 0 6 7 5 1 D T -9 1 -0 7 -Û S PLESSEY ADVANCE INFORMATION Semiconductors. SP9131 520MHz ECL DUAL D FLIP-FLOP The SP9131 Dual D type flip-flop Is pin compatible with 10131, but has improved dynamic performance.
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D00b7Sl
SP9131
520MHz
SP9131
MC10131
10H131
72E0S13
SP9131DG
pin compatible with PLESSEY
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transistor 3609
Abstract: SL3127 CA3127 DS3628 SL3227 plessey SL3127 IC GEC SL322
Text: DS3628 - 1.3 SL3227 3GHz NPN TRANSISTOR ARRAYS The SL3227 is a monolithic array of the five high frequency low current NPN transistors in a 16 lead DIL package. The transistors exhibit typical fT of 3GHz and wideband noise figures of 2dB. The SL3227 is pin compatible with the CA3127
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DS3628
SL3227
SL3227
CA3127
SL3127.
transistor 3609
SL3127
CA3127
plessey SL3127
IC GEC
SL322
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Untitled
Abstract: No abstract text available
Text: S i GEC PLESSEY ADVANCE INFORMATION S E M I C O N D U C T O R S D S 3673-1-1 SP8735 600MHZ+8 BINARY OUTPUTS INTERNAL BIAS DECOUPLING [ 1 ‘A’ OUTPUT FEATURES 16 ] CLOCK INPUT INHIBIT 2 15 RESET[ 3 • Binary Outputs to Open Collectors o z I— I The SP8735 is a h-8 ECL counter with binary outputs. In
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SP8735
600MHZ
SP8735
600mV
37bfiSS2
G0212c
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Untitled
Abstract: No abstract text available
Text: GEC PLESSEY S E M I C O N D U C T O R S ADVANCE INFORMATION DS3673-1-1 SP8735 600MHZ+8 BINARY OUTPUTS The SP8735 is a -1-8 ECL counter with binary outputs. In addition, carry outputs are provided in TTL and ECL. The AC coupled input requires a 600mV p-p signal and the outputs are
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DS3673-1-1
SP8735
600MHZ
SP8735
600mV
ECLIII/10K
ECLIII/10k
940L2
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SP8678
Abstract: No abstract text available
Text: GEC PLESSEY s e m i c o n d u c t o r s ! _ SP8678 1500MHz * 8 The SP8678 is an asynchronous ECL counter which provides ECL compatible outputs. It features an ECL compatible input inhibit which simplifies the design of frequency counters and other instrumentation.
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SP8678
1500MHz
SP8678
475mW
III/10K
00V/ps
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SP8736
Abstract: SP8786A SP8785A sp8785
Text: PLESSEY SEMICONDUCTORS 15E D • 7220513 0QCHfl33 SP8785A&B 1000MHz + 20/22 SP8786A&B i3oomhz - 20/22 The SP8785 and SP8786 are high speed 2 modulus counters for use up to 1.0 and 1.3GHz respectively. They feature ECL compatible control Inputs and outputs and are
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0QCHfl33
SP8785A
1000MHz
SP8786A
SP8785
SP8786
450mW
Gradeelai430Q
III/10K
SP8785/6
SP8736
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Untitled
Abstract: No abstract text available
Text: S i GEC PLESSEY ADVANCE INFORMATION S I M I O (S I l t T O K s SP5026 1.0 GHz 3-WIRE BUS CONTROLLED SYNTHESISER (Supersedes Septem ber 1992 edition) The SP5026 is a programming variant of the SP5S10, allowing the design of one tuner with either l2C bus or 3-wire
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SP5026
SP5026
SP5S10,
SP5026,
a15-bit
TD6380;
TD6382.
37bfl5
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tcxo b31
Abstract: No abstract text available
Text: S i GEC PLESSEY S V M I C O N D U C T O R S PRELIMINARY INFORMATION GP2015 GLOBAL POSITIONING SYSTEM RECEIVER RF FRONT END The GP2015 is a small format RF Front-end for Global Positioning System GPS receivers. Equivalent in performance to the GP2010 but in a TQFP package, this
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GP2015
GP2015
GP2010
42MHz)
GP2021
000MHz
37bflSSE
tcxo b31
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Untitled
Abstract: No abstract text available
Text: Si GEC PLESSEY S I M I C O l\ t> U C T l H S DS4056 • 2.5 GP2010 GLOBAL POSITIONING SYSTEM RECEIVER RF FRONT END The GP2010 is GEC Plessey Semiconductors' second generation RF Front-end for Global Positioning System GPS) receivers. The GP2010 uses many innovative design
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GP2010
GP2010
42MHz)
0-69S/0-715)
100LEADS
100-LEAD
GP100/R
80-LEAD
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Untitled
Abstract: No abstract text available
Text: S i GEC PLESSEY S E M I C O N Ü U ADVANCE INFORMATION T O R S DS2452 - 2.1 SP5024 1.3 GHz 3-WIRE BUS CONTROLLED SYNTHESISER The SP5024 is a programming variant of the SP5510 allowing the design of one tuner with either l2C bus or 3-wire bus format depending on which device is inserted. The
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DS2452
SP5024
SP5024
SP5510
SP5024,
50kHz,
0025CHÃ
50kHz)
37b6S2S
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Untitled
Abstract: No abstract text available
Text: P S ilG E C PLESSEY ADVANCE INFORMATION DS3651-2.0 SP8741 300MHZ-S-6/7 The SP 8741 is an ECL -s-6/7 two-modulus divider, with ECL1 OK compatible outputs. It divides by 6 wtien either of the ECL control inputs, PE1 or PE2, is in the high state and by 7 when both are low or open circuit . An AC coupled input of
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DS3651-2
SP8741
300MHZ-S-6/7
600mVp-p
100mV.
ECL10K
SP8741
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Untitled
Abstract: No abstract text available
Text: X GEC PLESSEY ADVANCE INFORMATION S E M I C O N D U C T O R S DS3650-1 2 SP8720 300MHz-*-3/4 The SP8720 is an ECL two-modulus divider, with ECL10K compatible outputs. It divides by 3 when either of the ECL control inputs, PE1 or PE2, is in the high state and by 4 when both are low
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DS3650-1
SP8720
300MHz-
SP8720
ECL10K
600mVp-p
SPS720
III/10K
00V/ns.
ECL10K
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Untitled
Abstract: No abstract text available
Text: S i GEC PLESSEY S L M I C O N D U C: T O K S ADVANCE INFORMATION DS3651-2.0 SP8741 300MHZ+6/7 The SP 8741 is an ECL +6/7 two-modulus divider, with ECL1 OK compatible outputs. It divides by 6 when either of the ECL control inputs, PE1 or PE2, is in the high state and by 7
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DS3651-2
SP8741
300MHZ
600mVp-p
100mV.
37bA522
ECL10K
ECLIII/10K
SP8741
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Untitled
Abstract: No abstract text available
Text: S i GEC PLESSEY S I M I O >N I li ( I O It S SP5026 1.0 GHz 3-WIRE BUS CONTROLLED SYNTHESISER (Supersedes September 1992 edition) The SP5026 is a programming variant of the SP5510, allowing the design of one tuner with either l2C bus or 3-wlre bus format depending on which device is inserted. The
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SP5026
SP5026
SP5510,
SP5026,
select25kHz,
0G272LM
0G272bS
272bb
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8680B
Abstract: No abstract text available
Text: P^pi GEC PLESSEY ADVANCE INFORMATION DS3645-1-2 SP8680B 575MHz-4-10/11 The SP8680B is an ECL variable modulus divider, with ECL and TTL compatible outputs. The circuit can operate from either ECL or TTL supplies. It divides by 10 when either of the ECL control inputs, PET or FE2, is in the high state and by 11
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DS3645-1-2
SP8680B
575MHz-4-10/11
SP8680B
8680B
650MHz
50kft
8680B
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Untitled
Abstract: No abstract text available
Text: GE C P L E S S E Y Si si Mit Junens ADVANCE INFORMATION o \ I v c: I o K S DS40S6-2.4 GP2010 GLOBAL POSITIONING SYSTEM RECEIVER RF FRONT END The GP2010 is GEC Plessey Semiconductors' second generation RFFront-end for Global Positioning System GPS) receivers. The GP2010 uses many innovative design
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DS40S6-2
GP2010
GP2010
TheGP2010
42MHz)
37bfiS22
GD24f
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fairchild 11c90
Abstract: SP888 SP8680B
Text: PLESSEY SEMICONDUCTORS 1 2E D 7220513 00GT775 S Sem iconductors SP8680B 600MHz - 10/11 TheSP8680 is an ECL counter with both ECL10K and i n compatible outputs. The circuit can operate from either ECL or TTL supplies. The division ratio is controlled by two
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00GT775
SP8680B
600MHz
TheSP8680
ECL10K
T-45-19-09
fairchild 11c90
SP888
SP8680B
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SP8735B
Abstract: No abstract text available
Text: PLESSEY SEMICONDUCTORS 15E & • 7220513 G DCHfln T ■ SP8735B 600MHz + 8 BINARY OUTPUTS The SP8735 is an ECL counter with binary outputs. In addition, carry outputs are provided in TTL and ECL. The AC coupled input requires 600mV p-p, and the outputs are open
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SP8735B
600MHz
SP8735
600mV
III/10K
SP8735B
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Untitled
Abstract: No abstract text available
Text: PLESSEY 12E S EMI COND UCT ORS D • 7220513 OOIGSTI 4 SP8720AC 300MHz -Ï- 3/4 TWO MODULUS DIVIDER CONFORMS TO MIL-STD-883C CLASS B The SP8720 is an ECL counter with ECL 10K compatible outputs. It divides by 3 when either control input is in the ‘high’ state and by 4 when both are ‘low’ (or open circuit). An
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SP8720AC
300MHz
MIL-STD-883C
SP8720
600mV
MIL-M-38510
T-90-20
001D420
20-PIN
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Untitled
Abstract: No abstract text available
Text: G 1 C PLESSEY JAUNARY1997 D.S.3102 3.0 SP5026 1.0 GHz 3-WIRE BUS CONTROLLED SYNTHESISER Supersedes version in October 1996 Media 1C Handbook, HB4599-1.0 * See notes on pin compatibility on page 4 f Normal ESD handling procedures should be observed c rystal[
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JAUNARY1997
SP5026
HB4599-1
2N390
31-25kHz)
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L905
Abstract: SP8740A
Text: PLESSEY SEMICONDUCTORS 1 2E 7220513 D 00103G3 2 A Semiconductors. PLESSEY SP8740AC 300MHz -r- 5/6 TWO-MODULUS DIVIDER CONFORMS TO MIL-STD-883C CLASS B The SP8740 is an ECL counter with ECL 10K compatible output. It divides by 5 when either control input is in the high
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00103G3
SP8740AC
300MHz
MIL-STD-883C
SP8740
600mV
MIL-M-38510
240mW
T-90-20
7EE0513
L905
SP8740A
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AN4364
Abstract: plessey gps receiver ST GEC 41
Text: P^pi GEC PLESSEY Octobers S E M I C O N D U C T O R S DS4056 •3.4 GP2010 GLOBAL POSITIONING SYSTEM RECEIVER RF FRONT END Supersedes edition in August 1996 Global Positioning Products Handbook, HB4305-1.0 The GP2010 is GEC Plessey Semiconductors' second
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DS4056
GP2010
HB4305-1
GP2010
200mW
37bfl522
AN4364
plessey gps receiver
ST GEC 41
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Untitled
Abstract: No abstract text available
Text: GEC PLESSEY SEMICONDU CT ORS ADVANCE INFORMATION DS3647-1-2 SP8690 200MHZ-M0/11 SP8691 200MHZ+8/9 The SP8690 and SP8691 are low power ECl variable modulus dividers, with both ECL1 OK and TTL/CMOS compatible outputs. They divide by the lower division ratio when either of
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DS3647-1-2
SP8690
200MHZ-M0/11
SP8691
200MHZ
SPS690
10are
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