Untitled
Abstract: No abstract text available
Text: Agilent N5980A 3.125 Gb/s Serial BERT Data Sheet Version 1.0 Key Benefits • Standard measurement rates between 125 Mb/s and 3.125 Gb/s • Electrical and optical SFP interfaces (generator: concurrently) • PRBS, K28.5 pattern or clock generation and integrated
|
Original
|
N5980A
N5980A
5989-4752EN
|
PDF
|
C101
Abstract: SN65LVCP22 SN65LVCP23 SN65LVCP23D SN65LVCP23PW SN65LVDS101
Text: SN65LVCP23 www.ti.com SLLS554B – NOVEMBER 2002 – REVISED JUNE 2003 2x2 LVPECL CROSSPOINT SWITCH FEATURES D High Speed 2x2 LVPECL Crosspoint Switch D LVDS Crosspoint Switch Available in SN65LVCP22 D 50 ps Typ , of Peak-to-Peak Jitter With PRBS = 223–1 Pattern
|
Original
|
SN65LVCP23
SLLS554B
SN65LVCP22
C101
SN65LVCP22
SN65LVCP23
SN65LVCP23D
SN65LVCP23PW
SN65LVDS101
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN65LVCP23 www.ti.com SLLS554C − NOVEMBER 2002 − REVISED SEPTEMBER 2004 2x2 LVPECL CROSSPOINT SWITCH FEATURES D High Speed 2x2 LVPECL Crosspoint Switch D LVDS Crosspoint Switch Available in SN65LVCP22 D 50 ps Typ , of Peak-to-Peak Jitter With PRBS = 223–1 Pattern
|
Original
|
SN65LVCP23
SLLS554C
SN65LVCP22
SN65LVCP23
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN65LVCP23 www.ti.com SLLS554B – NOVEMBER 2002 – REVISED JUNE 2003 2x2 LVPECL CROSSPOINT SWITCH FEATURES D High Speed 2x2 LVPECL Crosspoint Switch D LVDS Crosspoint Switch Available in SN65LVCP22 D 50 ps Typ , of Peak-to-Peak Jitter With PRBS = 223–1 Pattern
|
Original
|
SN65LVCP23
SLLS554B
SN65LVCP22
SN65LVCP23
|
PDF
|
HDTV transmitter receivers block diagram
Abstract: C101 SN65LVCP22 SN65LVCP23 SN65LVCP23D SN65LVCP23PW SN65LVDS101 redundant transmission LVCP23
Text: SN65LVCP23 www.ti.com SLLS554C − NOVEMBER 2002 − REVISED SEPTEMBER 2004 2x2 LVPECL CROSSPOINT SWITCH FEATURES D High Speed 2x2 LVPECL Crosspoint Switch D LVDS Crosspoint Switch Available in SN65LVCP22 D 50 ps Typ , of Peak-to-Peak Jitter With PRBS = 223–1 Pattern
|
Original
|
SN65LVCP23
SLLS554C
SN65LVCP22
HDTV transmitter receivers block diagram
C101
SN65LVCP22
SN65LVCP23
SN65LVCP23D
SN65LVCP23PW
SN65LVDS101
redundant transmission
LVCP23
|
PDF
|
verilog code of prbs pattern generator
Abstract: verilog code 16 bit LFSR in PRBS prbs using lfsr verilog prbs generator LFE2M50E prbs generator
Text: LatticeECP2M PRBS SERDES Demo User’s Guide June 2010 Technical Note TN1153 Introduction This demo illustrates the SERDES/PCS abilities of the LatticeECP2M FPGA family. It does this by embedding a simple pseudo-random pattern into an 8b10b-encoded PCS payload, then looping back the payload, and checking
|
Original
|
TN1153
8b10b-encoded
LFE2M-50E
TN1124,
verilog code of prbs pattern generator
verilog code 16 bit LFSR in PRBS
prbs using lfsr
verilog prbs generator
LFE2M50E
prbs generator
|
PDF
|
verilog prbs generator
Abstract: verilog code of prbs pattern generator verilog code 16 bit LFSR in PRBS fpga loader ECP2M LFE2M50E TN1124 prbs generator ISPVM
Text: LatticeECP2M PRBS SERDES Demo User’s Guide August 2009 Technical Note TN1153 Introduction This demo illustrates the SERDES/PCS abilities of the LatticeECP2M FPGA family. It does this by embedding a simple pseudo-random pattern into an 8b10b-encoded PCS payload, then looping back the payload, and checking
|
Original
|
TN1153
8b10b-encoded
LFE2M-50E
1-800-LATTICE
LFE2M-50E.
verilog prbs generator
verilog code of prbs pattern generator
verilog code 16 bit LFSR in PRBS
fpga loader
ECP2M
LFE2M50E
TN1124
prbs generator
ISPVM
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 19-2167; Rev 0; 10/01 KIT ATION EVALU E L B A AVAIL Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100Ω Drive Features ♦ Ultra-Low 90psp-p max Added Deterministic Jitter at 800Mbps (223-1) PRBS Pattern Ultra-low 90psp-p (max) added deterministic jitter and
|
Original
|
800Mbps,
10-Port
90psp-p
800Mbps
800Mbps
MAX9153)
MAX9154)
ANSI/EIA/TIA-644
DS90LV110
|
PDF
|
C101
Abstract: SN65LVCP22 SN65LVCP23 SN65LVCP23D SN65LVCP23PW SN65LVDS101 redundant transmission LVCP23
Text: SN65LVCP23 www.ti.com SLLS554 – NOVEMBER 2002 2x2 2000 Mbps LVPECL CROSSPOINT SWITCH Crosspoint Switch D LVDS Crosspoint Switch Available in SN65LVCP22 D Low-Jitter 2000-Mbps Fully Differential Data Path D 20 ps Typ , 40 ps (Max), of Peak-to-Peak Jitter With PRBS = 223–1 Pattern at 2000 Mbps
|
Original
|
SN65LVCP23
SLLS554
SN65LVCP22
2000-Mbps
C101
SN65LVCP22
SN65LVCP23
SN65LVCP23D
SN65LVCP23PW
SN65LVDS101
redundant transmission
LVCP23
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Agilent N4967A Serial BERT System 40 Gb/s 40G BER test system SB40B Data Sheet Complete cost effective solution for 40, 28, and 25 Gb/s device characterization and production testing Key features • Operates at data rates from 22 to 44 Gb/s • True PRBS pattern generation at full data rate
|
Original
|
N4967A
SB40B)
N4974A
5991-0709EN
|
PDF
|
vsc3104xvp
Abstract: No abstract text available
Text: VSC3104 Datasheet Applications Features ● ● ● ● ● ● ● ● ● ● ● ● ● ● 4 input by 4 output crosspoint switch 6.5 Gbps NRZ data bandwidth Programmable global and individual channel input signal equalization and output drive levels On-board PRBS generator and detector
|
Original
|
VSC3104
VMDS-10036
VSC3104
VSC3104-01,
VSC3104-01
vsc3104xvp
|
PDF
|
prbs pattern generator
Abstract: K286 post on self test circuit diagram
Text: 8. Stratix GX Built-In Self Test BIST SGX52008-1.1 Introduction Each Stratix GX channel in the gigabit transceiver block contains embedded built-in self test (BIST) circuitry, which is available for quick device verification. The BIST circuitry consists of a data generator that
|
Original
|
SGX52008-1
prbs pattern generator
K286
post on self test circuit diagram
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Agilent N4973A PRBS Generator 22 Gb/s Data Sheet Features • High performance PRBS generator • 11 to 22 Gb/s data rates • 2e7, 2e15, and 2e31 patterns Figure 1. Driver amplifier test set-up Shown above is a typical measurement setup for measuring modulator driver amplifiers.
|
Original
|
N4973A
N4984A-040)
5991-0721EN
|
PDF
|
vhdl code for 16 prbs generator
Abstract: verilog code of prbs pattern generator VHDL CODE FOR 16 bit LFSR in PRBS verilog code 16 bit LFSR in PRBS prbs generator using vhdl prbs pattern generator using vhdl XAPP884 verilog prbs generator prbs using lfsr DESIGN AND IMPLEMENTATION OF PRBS GENERATOR
Text: Application Note: Xilinx FPGAs An Attribute-Programmable PRBS Generator and Checker XAPP884 v1.0 January 10, 2011 Summary Author: Daniele Riccardi and Paolo Novellini In serial interconnect technology, it is very common to use pseudorandom binary sequence
|
Original
|
XAPP884
vhdl code for 16 prbs generator
verilog code of prbs pattern generator
VHDL CODE FOR 16 bit LFSR in PRBS
verilog code 16 bit LFSR in PRBS
prbs generator using vhdl
prbs pattern generator using vhdl
XAPP884
verilog prbs generator
prbs using lfsr
DESIGN AND IMPLEMENTATION OF PRBS GENERATOR
|
PDF
|
|
DESIGN AND IMPLEMENTATION OF PRBS GENERATOR
Abstract: ecl accumulator 004II
Text: Preliminary Datasheet 155/622 Mhz 16 Channel p r b s VSC8109 Generator and Comparator. Features Multiple Length PRBS Generator With Adjustable M ark Ratios PRBS Error Detector and 16-bit Accumulator STS-192/STM-64 Selectable Frame Insertion 16 Bit Static and Selectable Divider Output
|
OCR Scan
|
VSC8109
16-bit
STS-192/STM-64
VSC8109
G52207-0,
DESIGN AND IMPLEMENTATION OF PRBS GENERATOR
ecl accumulator
004II
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Agilent N4975A PRBS generator 56 Gb/s Data Sheet Description Features • Self-contained PRBS generator • Built-in, quarter-rate clock source 14.0 GHz • 1010, 1100, and 2e15 patterns • 400-800 mV, adjustable differential output • Quarter rate (Clk/4) clock input
|
Original
|
N4975A
performan929
5991-0724EN
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SEMICONDUCTOR CORPORATION Preliminary Datasheet 155/622 Mhz 16 Channel PRBS VSC8109 Generator and Comparator. Features Multiple Length PRBS Generator With Adjustable M ark Ratios PRBS Error Detector and 16-bit Accumulator STS-192/STM-64 Selectable Frame Insertion
|
OCR Scan
|
VSC8109
16-bit
STS-192/STM-64
VSC8109
G52207-0,
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Agilent N4970A PRBS generator 10 Gb/s with integrated clock test accessory TG2P1A Data Sheet Description Key features • Fixed-frequency clock source • Wide operating range, from • 50 Mb/s to 12.5 Gb/s • RMS jitter ~ 1.5 ps • Fast rise/fall times ~ 25 ps
|
Original
|
N4970A
5991-0723EN
|
PDF
|
9985 agilent
Abstract: agilent 9985 81134A N4871A versa max nano & micro Micro yig oscillator 5988-9591EN
Text: Agilent Technologies 81133A and 81134A 3.35 GHz Pulse Pattern Generators Data Sheet Key features Figure 1: 81134A 81133A and 81134A 3.35 GHz Pulse Pattern Generators The need for pulse and pattern generation is fundamental to digital device characterization
|
Original
|
1133A
1134A
1134A
5988-5549EN
9985 agilent
agilent 9985
81134A
N4871A
versa max nano & micro
Micro yig oscillator
5988-9591EN
|
PDF
|
Untitled
Abstract: No abstract text available
Text: N4902B SerialBERT 7 Gb/s Data Sheet Version 2.5 General The N4902B SerialBERT 7 Gb/s operates within a range from 150 Mb/s up to 7 Gb/s. Available configurations are: • one Pattern Generator and one Error Detector · one Pattern Generator only · one Error Detector only
|
Original
|
N4902B
6130A
5989-0399EN
|
PDF
|
Untitled
Abstract: No abstract text available
Text: N4901B SerialBERT 13.5 Gb/s Data Sheet Version 2.05 General The N4901B SerialBERT 13.5 Gb/s operates within a range from 150 Mb/s up to 13.5 Gb/s. Available configurations are: • one Pattern Generator and one Error Detector · one Pattern Generator only · one Error Detector only
|
Original
|
N4901B
6130A
Seri26
5989-0398EN
com/find/N4900
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Agilent 81133A and 81134A 3.35 GHz Pulse Pattern Generators Data Sheet Version 1.3 81133A and 81134A 3,35 GHz Pulse Pattern Generators The need for pulse and pattern generation is fundamental to digital device characterization tasks. The ability to emulate the pulse
|
Original
|
1133A
1134A
5988-5549EN
|
PDF
|
n490
Abstract: IEE802 N4902B
Text: N4902B SerialBERT 7 Gbps Technical Specification Version 1.0 General The N4902B SerialBERT 7 Gbps operates within a range from 620 Mbps up to 7 Gbps. Available configurations are: • one Pattern Generator and one Error Detector · one Pattern Generator only
|
Original
|
N4902B
6130A
5989-0399EN
n490
IEE802
|
PDF
|
N4910A
Abstract: N4901B IEE802 86130A 8125
Text: N4901B SerialBERT 13.5 Gbps Technical Specification Version 1.0 General The N4901B SerialBERT 13.5 Gbps operates within a range from 620 Mbps up to 13.5 Gbps. Available configurations are: • one Pattern Generator and one Error Detector · one Pattern Generator only
|
Original
|
N4901B
5989-0398EN
com/find/N4900
N4910A
IEE802
86130A
8125
|
PDF
|