Untitled
Abstract: No abstract text available
Text: DS92LV1260 DS92LV1260 Six Channel 10 Bit BLVDS Deserializer Literature Number: SNLS134E DS92LV1260 Six Channel 10 Bit BLVDS Deserializer General Description Features The DS92LV1260 integrates six deserializer devices into a single chip. The chip uses a 0.25u CMOS process technology. The DS92LV1260 can simultaneously deserialize up to
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DS92LV1260
DS92LV1260
SNLS134E
DS92LV1021
DS92LV1023
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m1 250c fuse
Abstract: at32uc3c em 234 stepper dtx 370 DTH block diagram lta 301 VT 546 Modem basic circuit diagram EIC 4021 shift registers 4050
Text: Features • High Performance, Low Power 32-bit AVR Microcontroller – – – – • • • • • • • • • • • • Compact Single-cycle RISC Instruction Set Including DSP Instruction Set Built-in Floating-Point Processing Unit FPU Read-Modify-Write Instructions and Atomic Bit Manipulation
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32-bit
9166D-AVR
m1 250c fuse
at32uc3c
em 234 stepper
dtx 370
DTH block diagram
lta 301
VT 546
Modem basic circuit diagram
EIC 4021
shift registers 4050
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DS92LV18
Abstract: 2003120 ds92lv18tvv
Text: DS92LV18 DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz Literature Number: SNLS156D DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz General Description Features The DS92LV18 Serializer/Deserializer SERDES pair transparently translates a 18–bit parallel bus into a BLVDS serial
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DS92LV18
DS92LV18
18-Bit
SNLS156D
18-bit,
2003120
ds92lv18tvv
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DS100BR210
Abstract: 10G-KR
Text: DS100BR210 Ultra Low Power 10.3 Gbps 2-Channel Repeater with Input Equalization and Output De-Emphasis General Description Features The DS100BR210 is an extremely low power, high performance dual-channel repeater for serial links with data rates up to 10.3 Gbps. The DS100BR210 is configured as two unidirectional channels.
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DS100BR210
AWG-30
10G-KR
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Untitled
Abstract: No abstract text available
Text: DS92LV16 DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz Literature Number: SNLS138G DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz General Description Features The DS92LV16 Serializer/Deserializer SERDES pair transparently translates a 16–bit parallel bus into a BLVDS serial
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DS92LV16
DS92LV16
16-Bit
SNLS138G
DS92LV1616-Bit
16-bit,
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GCM 38112
Abstract: Wifi to I2C ST ATUC3A4256S AT32UC3A3 dsp ssb modulation demodulation barcode reader using avr AT32UC3A64 ATUC3A3256 DesignWare Hi-Speed USB On-The-Go Controller AT32UC3A3256S
Text: Features • High Performance, Low Power 32-bit AVR Microcontroller • • • • • • • • • • • • – Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation
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32-bit
51DMIPS/MHz
92DMIPS
66MHz
36MHz
256KBytes,
128KBytes,
64KBytes
32072D04/2011
GCM 38112
Wifi to I2C ST
ATUC3A4256S
AT32UC3A3
dsp ssb modulation demodulation
barcode reader using avr
AT32UC3A64
ATUC3A3256
DesignWare Hi-Speed USB On-The-Go Controller
AT32UC3A3256S
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OC48
Abstract: SSTL-15 SSTL-18
Text: Arria II Device Handbook Volume 3: Device Datasheet and Addendum Arria II Device Handbook Volume 3: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V3-4.0 Document last updated for Altera Complete Design Suite version:
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Untitled
Abstract: No abstract text available
Text: DAC1653Q/DAC1658Q Quad 16-bit DAC: 10 Gbps JESD204B interface: x2, x4 and x8 interpolating Advance data sheet Revision 2.3.1 1. GENERAL DESCRIPTION DAC1653Q and DAC1658Q are high-speed, high-performance 16-bit quad channel Digital-to-Analog Converters DACs .
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DAC1653Q/DAC1658Q
16-bit
JESD204B
DAC1653Q
DAC1658Q
DAC165xQ.
DAC165xQ
DAC1653Q;
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Untitled
Abstract: No abstract text available
Text: Product Folder Sample & Buy Technical Documents Support & Community Tools & Software ADC16DX370 SNVSA18B – APRIL 2014 – REVISED APRIL 2014 ADC16DX370 Dual 16-Bit 370 MSPS ADC With 7.4 Gb/s JESD204B Outputs 1 Features 3 Description • • • • The ADC16DX370 device is a monolithic dualchannel high performance analog-to-digital converter
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ADC16DX370
SNVSA18B
ADC16DX370
16-Bit
JESD204B
16-bit
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Untitled
Abstract: No abstract text available
Text: DS125MB203 www.ti.com SNLS432B – OCTOBER 2012 – REVISED APRIL 2013 Low-Power 12.5-Gbps Dual-Lane 2:1/1:2 Mux/Buffer With Equalization and De-Emphasis Check for Samples: DS125MB203 FEATURES DESCRIPTION • The DS125MB203 is an extremely low-power highperformance dual-port 2:1 mux and 1:2 switch/fanout
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DS125MB203
SNLS432B
DS125MB203
10G-KR,
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Untitled
Abstract: No abstract text available
Text: Product Folder Sample & Buy Support & Community Tools & Software Technical Documents DS125BR401A SNLS466A – SEPTEMBER 2013 – REVISED MARCH 2014 DS125BR401A Low-Power 12 Gbps 4-Lane Linear Repeater With Equalization 1 Features 3 Description • The DS125BR401A is an extremely low-power highperformance repeater/redriver designed to support
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DS125BR401A
SNLS466A
DS125BR401A
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energy tapping identifier wireless data acquisition
Abstract: interpolation CIC Filter iso 7811-9 sine wave pwm circuit pec 4179 Isdi cmos sensor edp 2339 ARM926EJ atmel sam4l ram schematic diagram
Text: Features • Core • • • • – ARM CortexTM-M4 running at up to 48 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set picoPower® Technology for Ultra-low Power Consumption – Active mode downto 90µA/MHz with configurable voltage scaling
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256Kbytes
64-bit
42023B
energy tapping identifier wireless data acquisition
interpolation CIC Filter
iso 7811-9
sine wave pwm circuit
pec 4179
Isdi cmos sensor
edp 2339
ARM926EJ
atmel sam4l
ram schematic diagram
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PX3-2
Abstract: AT32UC3A0256 128f 385P AT32UC3A0512
Text: Features • High Performance, Low Power 32-Bit Atmel AVR® Microcontroller • • • • • • • • • • • • • • • • – Compact Single-cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation
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32-Bit
33MHz
32058K
-AVR32-01/12
PX3-2
AT32UC3A0256
128f
385P
AT32UC3A0512
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nrzi Decoder
Abstract: DS32EL0124 DS32EL0124SQ DS32EL0124SQE DS32EL0124SQX DS32ELX0124 DS32ELX0124SQ
Text: DS32EL0124, DS32ELX0124 125 MHz - 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface General Description Features The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and
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DS32EL0124,
DS32ELX0124
DS32EL0124/DS32ELX0124
DS32EL0124/DS32ELX01214
nrzi Decoder
DS32EL0124
DS32EL0124SQ
DS32EL0124SQE
DS32EL0124SQX
DS32ELX0124
DS32ELX0124SQ
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DS32ELX0124SQE
Abstract: DS32EL0124 dvi-d 24 pin diagram DS32EL0124SQ DS32EL0124SQE DS32EL0124SQX DS32ELX0124 DS32ELX0124SQ
Text: DS32EL0124, DS32ELX0124 125 MHz — 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface General Description Features The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and
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DS32EL0124,
DS32ELX0124
DS32EL0124/DS32ELX0124
DS32EL0124/DS32ELX01214
DS32ELX0124SQE
DS32EL0124
dvi-d 24 pin diagram
DS32EL0124SQ
DS32EL0124SQE
DS32EL0124SQX
DS32ELX0124
DS32ELX0124SQ
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iodelay
Abstract: XAPP880 OSERDES pmbus verilog FIFO18E1 ML605 ISERDES example ml605 XAPP855 samtec QSE
Text: Application Note: Virtex-6 FPGAs SFI-4.1 16-Channel SDR Interface with Bus Alignment Using Virtex-6 FPGAs XAPP880 v1.0 February 10, 2010 Author: Vasu Devunuri Summary This application note describes an SFI-4.1 reference design that implements the OIF-SFI4-01.01 interface [Ref 1], a 16-channel, source-synchronous LVDS interface operating
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16-Channel
XAPP880
OIF-SFI4-01
16-channel,
iodelay
XAPP880
OSERDES
pmbus verilog
FIFO18E1
ML605
ISERDES
example ml605
XAPP855
samtec QSE
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UG366
Abstract: XC6VLX75T-FF784 aurora GTX XC6VLX240T-FF1759 verilog code of prbs pattern generator XC6VLX130T-FF784 XC6VSX475T-FF XC6VLX240T-FF784 XC6VLX130T FF1156
Text: Virtex-6 FPGA GTX Transceivers User Guide UG366 v2.2 February 23, 2010 Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
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UG366
UG366
XC6VLX75T-FF784
aurora GTX
XC6VLX240T-FF1759
verilog code of prbs pattern generator
XC6VLX130T-FF784
XC6VSX475T-FF
XC6VLX240T-FF784
XC6VLX130T
FF1156
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dvi-d 24 pin diagram
Abstract: DS32EL0421 DS32ELX0421 SDI scrambler DVI-D Single Link
Text: DS32EL0421, DS32ELX0421 125 – 312.5 MHz FPGA-Link Serializer with DDR LVDS Parallel Interface General Description Features The DS32EL0421/DS32ELX0421 is a 125 MHz to 312.5 MHz DDR serializer for high-speed serial transmission over FR-4 printed circuit board backplanes, balanced cables, and optical
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DS32EL0421,
DS32ELX0421
DS32EL0421/DS32ELX0421
dvi-d 24 pin diagram
DS32EL0421
DS32ELX0421
SDI scrambler
DVI-D Single Link
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59013 h 331
Abstract: 59014 c 331 comcode 105 736 490 fcs 9013 GR-253-CORE JT-G704 JT-G706 TMXL28155 TR-62411 59014 c
Text: Preliminary Data Sheet, Rev 2 June, 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.
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TMXL28155
x28/x21
Monitor0-712-4106)
DS01-298BBAC-2
DS01-298BBAC-1)
59013 h 331
59014 c 331
comcode 105 736 490
fcs 9013
GR-253-CORE
JT-G704
JT-G706
TR-62411
59014 c
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SCANSTA11
Abstract: No abstract text available
Text: SCAN921260 X6 1:10 Deserializer with IEEE 1149.1 JTAG and at-speed BIST General Description Features The SCAN921260 integrates six deserializer devices into a single chip. The SCAN921260 can simultaneously deserialize up to six data streams that have been serialized by the
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SCAN921260
SCAN921023
SCANSTA11
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144K64
Abstract: lucent m12 timing receiver GR-253-CORE TMXF84622 VC12 e2 framer g742 GR-253 J0 byte length 14 SLC-96 Mode Defined TTC 472 E2 liu
Text: Ultramapper Product Description, Rev. 1 4/25/2002 TMXF84622 Ultramapper 622/155 Mbits/s SONET/SDH x DS3/E3/DS2/DS1/E1/DS0 The documentation package for the TMXF84622 Ultramapper 622/155 Mbits/s SONET/SDH x DS3/E3/DS2/DS1/E1/DS0 system chip consists of the following documents:
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TMXF84622
DS02-085BBAC-1
DS02-085BBAC)
144K64
lucent m12 timing receiver
GR-253-CORE
VC12
e2 framer g742
GR-253 J0 byte length 14
SLC-96 Mode Defined
TTC 472
E2 liu
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Achronix Semiconductor
Abstract: No abstract text available
Text: I Speedster22i HD FPGA Family DS004 Rev. 2.6 – May 8, 2014 Preliminary Highlights • • • Advanced highest-density and highest‐bandwidth FPGA • Over 1.7 million effective look‐up‐tables • Abundant embedded hard IP for communica‐
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Speedster22i
DS004
Achronix Semiconductor
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ATMEL 910
Abstract: atmel910 SMC911 hsb 772 p interface bluetooth with AVR ptz decoder AC97 AT32AP7000 AVR32 rf mems switch
Text: Features • High Performance, Low Power AVR 32 32-Bit Microcontroller • • • • • • • • • • • • • • • • • • • – 210 DMIPS throughput at 150 MHz – 16 KB instruction cache and 16 KB data caches – Memory Management Unit enabling use of operating systems
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32-Bit
32KBytes
32003H
AVR32
ATMEL 910
atmel910
SMC911
hsb 772 p
interface bluetooth with AVR
ptz decoder
AC97
AT32AP7000
rf mems switch
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verilog code of prbs pattern generator
Abstract: dma controller VERILOG LED Dot Matrix vhdl code vhdl code for 16 prbs generator QII53027-10 prbs pattern generator using vhdl free verilog code of prbs pattern generator logic analyzer AR22 PRBS23
Text: Section IV. System Debugging Tools The Altera Quartus® II design software provides a complete design debugging environment that easily adapts to your specific design requirements. This handbook is arranged in chapters, sections, and volumes that correspond to the major tools
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