WSI PSD813F
Abstract: PSD413A1 PSD413A2 PSD813F PSD813F1
Text: Document: WSI-1018 April 27, 1998 Subject: End of Life Notification Devices: Multi-Chip Module PSD413F Devices Please discontinue use and move to OTP PSD413 Family or FLASH PSD813F Family Dear WSI Customer, Due to very limited demand, WSI is announcing the immediate obsolescence of the following MultiChip Module Devices:
|
Original
|
PDF
|
WSI-1018
PSD413F
PSD413
PSD813F
PSD413A1FH
PSD413A1FN
PSD413A2FH
PSD413A2FN
PSD413A1
PSD413A2
WSI PSD813F
PSD413A2
PSD813F1
|
683XX
Abstract: 68HC11 68HC16 A15F PSD411A1 PSD411A2 psd4xx flip flop T
Text: Programmable Peripheral PSD413F Family Avance Information Introduction Field-Programmable Microcontroller Peripherals with Flash Memory The PSD413F family of products is the first PSD family to bring the benefits of in-system programming to the embedded system designer. This new family is implemented with WSI’s
|
Original
|
PDF
|
PSD413F
PSD413
PSD411A1
PSD411A2
683XX
68HC11
68HC16
A15F
psd4xx
flip flop T
|
Avance Logic
Abstract: Z80 CPU APD Arrays Avance Logic A15F PIN DIAGRAM OF 80186 683XX 68HC11 68HC16 PSD411A1 PSD411A2
Text: Programmable Peripheral PSD413F Family Avance Information Introduction Field-Programmable Microcontroller Peripherals with Flash Memory The PSD413F family of products is the first PSD family to bring the benefits of in-system programming to the embedded system designer. This new family is implemented with WSI’s
|
Original
|
PDF
|
PSD413F
PSD413
PSD411A1
PSD411A2
Avance Logic
Z80 CPU
APD Arrays
Avance Logic A15F
PIN DIAGRAM OF 80186
683XX
68HC11
68HC16
|
A15F
Abstract: PSDsoft object file to hex file conversion Magic*PRO III psd4xx 80C31 PSD413A2 wsi Required Programming Algorithm Change
Text: Programmable Peripheral Application Note 047 Designing with the PSD413F – A PSD with Flash Memory By Ching Lee Introduction The PSD413F is the first member of the PSD family that supports In-System Programming ISP of the main program memory. The architecture is based on the PSD4XX core with
|
Original
|
PDF
|
PSD413F
PSD413F
0000-1FFF
h0000,
h9000,
hD555,
A15F
PSDsoft object file to hex file conversion
Magic*PRO III
psd4xx
80C31
PSD413A2
wsi Required Programming Algorithm Change
|
WSI PEP300 PSD3XX
Abstract: WSI PSD 32 pin eprom to eprom copier circuit wsi magicpro ii ALL07 Motorola intel 80c198 PWM AC MOTOR CONTROl psd5xx 29 pt 8521 philips WS6000C Magic*PRO III
Text: Programmable Peripherals for Microcontrollers 36' 3UR 3URGGXF XFWW 9LH 9LHZ ZHU RRQQ &&'' 1997, DKR, Rev. 2 1 AT A GLANCE A WSI Overview 36' 3UR 3URGGXF XFWW 9LH 9LHZ ZHU RRQQ &&'' 1996 • 1995 • • 1994 • PSD Sales 1993 • • Founded in 1983
|
Original
|
PDF
|
AD8-15/A8-15
WR\/B11
HBE\/B12
ALE/B10
RD\/B15
A19/CSI\
WSI PEP300 PSD3XX
WSI PSD
32 pin eprom to eprom copier circuit
wsi magicpro ii
ALL07 Motorola
intel 80c198 PWM AC MOTOR CONTROl
psd5xx
29 pt 8521 philips
WS6000C
Magic*PRO III
|
T flip flop pin configuration
Abstract: No abstract text available
Text: PSD413F Family The PSD413A2F ZPLD Block Key Features □ 2 Embedded ZPLD devices □ 24 macrocells □ Combinatorial/registered outputs □ Maximum 126 product terms □ Programmable output polarity □ User configured register clear/preset □ User configured register clock input
|
OCR Scan
|
PDF
|
PSD413F
PSD413A2F
T flip flop pin configuration
|
Untitled
Abstract: No abstract text available
Text: PSD413F Family General Description The PSD4XX series of Field Programmable Microcontroller Peripherals represent a major advance in the evolution of Programmable Peripherals. They combine an innovative architecture with state of the art technology to provide user PROGRAMMABILITY
|
OCR Scan
|
PDF
|
PSD413F
PSD413A2F.
PSD413F
|
Untitled
Abstract: No abstract text available
Text: PSD413F Family System Configuration The CSIOP signal, which is generated by the DPLD, selects the internal I/O devices or registers. The CSIOP signal takes up 256 bytes of address space and is defined by the user in the PSDSoft Software. The following is an address offset map for the various
|
OCR Scan
|
PDF
|
PSD413F
|
Untitled
Abstract: No abstract text available
Text: PSD413F Family Figure 2. PSDsoft Development Tools PSD413F Family Table 1. PSD413F Product Matrix There are 4 unique devices in the PSD413F family. The part classifications are based on ZPLD size and bus mode. The features of each part are listed in Table 1.
|
OCR Scan
|
PDF
|
PSD413F
PSD413A1FH
PSD413A1FN
PSD413A2FH
PSD413A2FN
|
Untitled
Abstract: No abstract text available
Text: PSD413F Family AC/DC The following tables describe the AD/DC parameters of the PSD413F family: PSIiMNitBfS □ DC Electrical Specification □ AC Timing Specification • ZPLD Timing - Combinatorial Delays - Synchronous Clock Mode - Asynchronous Clock Mode
|
OCR Scan
|
PDF
|
PSD413F
PSB413F
|
80196 MEMORY INTERFACE
Abstract: 80196 programs 80196 internal architecture diagram
Text: Programmable Peripheral PSD413F Family Advance Information Introduction Field-Programmable Microcontroller Peripherals with Flash Memory The PSD413F family of products is the first PSD family to bring the benefits of in-system programming to the embedded system designer. This new family is implemented with WSI's
|
OCR Scan
|
PDF
|
PSD413F
PSD413
PSD411A1
PSD411A2
80196 MEMORY INTERFACE
80196 programs
80196 internal architecture diagram
|
Untitled
Abstract: No abstract text available
Text: PSD413F Family The PSD413F Architecture The PSD413F consists of five major functional blocks: □ zpld Block □ Bus Interface □ I/O Ports □ Memory Block □ Power Management Unit The functions of each block are described in the following sections. Many of the blocks
|
OCR Scan
|
PDF
|
PSD413F
PSD413A1F
PSD413A2F
PS0413A1F
PSB413A1F
|