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    S-R FLIP FLOP CLOCK Search Results

    S-R FLIP FLOP CLOCK Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54H78J/B Rochester Electronics LLC 54H78 - Dual JK Flip-Flop w/pst, common clock/clear Visit Rochester Electronics LLC Buy
    54F377/QRA Rochester Electronics LLC 54F377/QRA - Octal D Flip-Flop with Clock Enable (5962-9091001MRA) Visit Rochester Electronics LLC Buy
    SN74HC377ANSR Texas Instruments Octal D-Type Flip-Flops With Clock Enable Visit Texas Instruments Buy
    SN74F377AN Texas Instruments Octal D-Type Flip-Flop With Clock Enable 20-PDIP 0 to 70 Visit Texas Instruments Buy
    SN74LS378D Texas Instruments Hex D-Type Flip-Flops with Clock Enable 16-SOIC 0 to 70 Visit Texas Instruments

    S-R FLIP FLOP CLOCK Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: Signetics 54LS109 Flip-Flop Dual J-K Positive Edge-Triggered Flip-Flop Product Specification Military Logic Products DESCRIPTION Th e 5 4 L S 1 09 is a dual positive edge-trig­ gered JR-type flip-flop featuring individual J, K, Clock, S et and R eset inputs; also


    OCR Scan     		54LS109 54LSXXX 500ns 1N916 1N3064, PDF

    LA 6348

    Abstract: 10231F 10231N 10231
    Text: Signetics 10231 Flip-Flop Dual D-Type Master-Slave Flip-Flop High-Speed Product Specification ECL Products DESCRIPTION The 10231 is a High-Speed Dual D-type Master-Slave Flip-Flop. It contains Asyn­ chronous Set (S) and Reset (R) which override Clock (CP) and Clock Enable


    OCR Scan     		wf123ws 800mVp-p 500ns LA 6348 10231F 10231N 10231 PDF

    7473 JK flip flop

    Abstract: IC 74LS73 74LS73D 7473PC 74LS73 dual JK JK flip flop IC Flip-Flop 7473PC pin DIAGRAM OF IC 7473 74LS73 JK JK flip flop IC diagram
    Text: 73 CO NNECTIO N DIAGRAM PINOUT A •A /Â 54/7473 ^ /54H /74H 73 O f1014 I/54LS/74LS73 DUAL JK FLIP-FLOP With Separate Clears and Clocks) D E S C R IP TIO N — The ’73 and ’H73 dual JK master/slave flip -flop s have a separate clock fo r each flip -flop . Inputs to the master section are controlled


    OCR Scan     		f1014 I/54LS/74LS73 54/74H 54/74LS CLS73) 7473 JK flip flop IC 74LS73 74LS73D 7473PC 74LS73 dual JK JK flip flop IC Flip-Flop 7473PC pin DIAGRAM OF IC 7473 74LS73 JK JK flip flop IC diagram PDF

    14027B

    Abstract: HD14027B
    Text: HD14027B Dual J - K Flip Flop The HD14027B dual J-K flip-flop has independent J, K, Clock C , Set(S) and Reset(R) inputs for each flip-flop. These devices may be used in control, register, or toggle functions. • PIN ARRANGEMENT ■ FEATURES • • •


    OCR Scan     		HD14027B HD14027B CD4027B MC14027B K20ns 14027B PDF

    Untitled

    Abstract: No abstract text available
    Text: M M O T O R O L A Military 10631 High Speed Dual D Type Master Slave Flip-Flop ELECTRICALLY TESTED PER: MIL-M-38510/06102 The 10631 is a dual master-slave type D flip-flop. Asynchronous Set (S) and Reset (R) override Clock (Cc) and Clock Enable (Cg) inputs. Each flip-flop may


    OCR Scan     		MIL-M-38510/06102 PDF

    Untitled

    Abstract: No abstract text available
    Text: R C H II- D S E M IC O N D U C T O R tm 74F175 Quad D Flip-Flop General Description Features The ’F175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is


    OCR Scan     		74F175 PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA DUAL J-K FLIP-FLOP MC14027B The MC14Q27B dual J-K flip-flop has independent J, K, Clock {Q, Set S and Reset |R) inputs for each flip-flop. These devices may be used in control, register, or toggle functions. CMOS SSI • • Diode Protection on A ll Inputs


    OCR Scan     		MC14Q27B MC14027B PDF

    10631 flip-flop

    Abstract: HA611 10631
    Text: M MOTOROLA Military 10631 High Speed Dual D Type Master Slave Flip-Flop ELECTRICALLY TESTED PER: MIL-M-38510/06102 The 10631 is a dual master-slave type D flip-flop. Asynchronous Set (S) and Reset (R) override Clock (C c) and Clock Enable (Cg) inputs. Each flip-flop may


    OCR Scan     		mil-m-38510/06102 in100 10631 flip-flop HA611 10631 PDF

    Untitled

    Abstract: No abstract text available
    Text: June 1997 Dual J-K Flip-Flop with Set and Reset File Number 3773 Functional Diagram The CD54HC109F3A and CD54HCT109F3A are dual J-K flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock 1CP and 2CP . The flip-flop is set and reset by active-low S and R,


    OCR Scan     		CD54HC109F3A CD54HCT109F3A 360nA 1000ns 500ns 400ns PDF

    74ls534

    Abstract: 74LS534N
    Text: R C H I I - P S E M IC O N D U C T O R tm DM74LS534 Octal D-Type Flip-Flop With General Description The ’LS534 is a high speed, low pow er octal D-type flip-flop featuring separate D -type inputs fo r each flip-flop and 3-STATE outputs fo r bus oriented applications. A buffered


    OCR Scan     		DM74LS534 LS534 LS374 74ls534 74LS534N PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA High Speed Dual Type D M aster-S lave Flip-Flop MC10231 The MC10231 is a dual m aster-slave type D flip -flop. Asynchronous Set S and Reset (R) override Clock (C c) and Clock Enable (Cg) inputs. Each flip-flop may be clocked separately by holding the common clock in the low state and


    OCR Scan     		MC10231 MC10231 50-ohm fci3b7252 DL122 PDF

    Untitled

    Abstract: No abstract text available
    Text: MC14025B See Page 6-5 MOTOROLA MCM025U8 See Page 6-14 MC14027B DUAL J-K FLIP-FLOP The M C14027B dual J-K flip-flop has independent J , K , Clock C , Set (S) and Reset (R ) inputs for each flip-flop. These devices may be used in control, register, or toggle functions.


    OCR Scan     		MC14025B MCM025U8 MC14027B C14027B PDF

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R 74LVX374 Low Voltage Octal D Flip-Flop w ith 3-STATE O utputs General Description Features The LVX374 is a high-speed, low -pow er octal D-type flip-flop featuring separate D-type inputs fo r each flip-flop and 3-STATE outputs fo r bus-oriented applications. A buffered


    OCR Scan     		74LVX374 LVX374 PDF

    Untitled

    Abstract: No abstract text available
    Text: S E M I C O N D U C T O R tm 74ABT374 Octal D-Type Flip-Flop with General Description The ABT374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered Clock CP and Output


    OCR Scan     		74ABT374 ABT374 PDF

    Untitled

    Abstract: No abstract text available
    Text: I R C H November 1988 iL D s e m ic o n d u c t o r Revised November 1999 74AC175 • 74ACT175 Quad D-Type Flip-Flop General Description Features The AC/ACT175 is a high-speed quad D-type flip-flop. The device is useful for general flip-flop requirements where


    OCR Scan     		74AC175 74ACT175 AC/ACT175 74ACT175 PDF

    mc10231

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA High Speed Dual Type D Master-Slave Flip-Flop MC10231 The M C 10231 is a dual m aster-slave type D flip -flop. Asynchronous Set S and Reset (R) override Clock (Cc) and Clock Enable (Ce ) inputs. Each flip-flop may be clocked separately by holding the common clock in the low state and


    OCR Scan     		MC10231 50-ohm DL122 PDF

    74ls112 pin diagram

    Abstract: 74ls112 pin configuration 74LS112 N74S112D 74ls112 function table
    Text: 7 4 LS1 1 2 , S 1 1 2 Flip-Flops S ig n e t ic s Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION The '112 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, Clock, Set and_Reset inputs. The Set So and Reset (R d) inputs, when LOW,


    OCR Scan     		1N916, 1N3064, 500ns 500ns 74ls112 pin diagram 74ls112 pin configuration 74LS112 N74S112D 74ls112 function table PDF

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74ALS109A Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The DM54ALS109A is a dual edge-triggered flip-flop. Each flip-flop has individual J, K, clock, clear and preset inputs, and also complementary Q and Q outputs.


    OCR Scan     		DM74ALS109A DM54ALS109A LS109 D53-0 DM74ALS109AM DM74ALS109AN PDF

    mc10131

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Type D Master-Slave Flip-Flop The MC10131 is a dual m aster-slave type D flip -flop. Asynchronous Set S and Reset (R) override Clock (C c) and Clock Enable ( C e ) inputs. Each flip-flop may be clocked separately by holding the common clock in the low state and


    OCR Scan     		MC10131 50-ohm DL122 PDF

    Untitled

    Abstract: No abstract text available
    Text: Preliminary S E M [ C O N D U C T O R TM 74LVTH273 Low Voltage Octal D-Type Flip-Flop with Clear Preliminary General Description The LVTH273 is a high-speed, low-power positive-edgetriggered octal D-type flip-flop featuring separate D-type inputs for each flip-flop. A buffered Clock (CP) and Clear


    OCR Scan     		74LVTH273 LVTH273 PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Type D Master-Slave Flip-Flop MC10131 The MC10131 is a dual master-slave type D flip -flop. Asynchronous Set S and Reset (R) override Clock (C c) and Clock Enable (C e ) inputs. Each flip-flop may be clocked separately by holding the common clock in the low state and


    OCR Scan     		MC10131 MC10131 50-ohm b3b7255 DL122 PDF

    mc10131

    Abstract: No abstract text available
    Text: MOTOROLA DUAL TYPE D MASTER-SLAVE FLIP-FLOP The MC10131 is a dual master-slave type D flip-flop. Asynchronous Set S and Reset (R) override Clock (C£) and Clock Enable (Cg) Inputs. Each flip-flop m ay be clocked separately by holding the com mon clock in the low state and using the enable inputs


    OCR Scan     		MC10131 MC10131 PDF

    mc10231

    Abstract: No abstract text available
    Text: M OTOROLA MC10231 HIGH SPEED DUAL TYPE D MASTER-SLAVE FUP-FLOP The MC10231 is a dual master-slave type D flip -flop. Asynchro­ nous Set S and Reset (R) override Clock (Cq ) and Clock Enable (Cg) inputs. Each flip-flop may be clocked separately by holding


    OCR Scan     		MC10231 PDF

    TTL 7474

    Abstract: 7474 pin out diagram 7474 D flip-flop circuit diagram 7474 7474 D flip-flop pin diagram of 7474 74LS74A pin out configuration 7474 j-k flip flop 7474 pin configuration pin configuration of d flip flip 7474
    Text: 7474, LS74A, S74 Signetics Flip-Flops Dual D-Type Flip-Flop Product Specification Logic Products DESCRIPTION Th e '7 4 is a dual positive edge-triggered D-type flip-flop featuring individual Data, Clock, S et and R eset inputs; also com ­ plem entary Q and Q outputs.


    OCR Scan     		LS74A, 1N916, 1N3064, 500ns TTL 7474 7474 pin out diagram 7474 D flip-flop circuit diagram 7474 7474 D flip-flop pin diagram of 7474 74LS74A pin out configuration 7474 j-k flip flop 7474 pin configuration pin configuration of d flip flip 7474 PDF