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    CDC2509

    Abstract: CDC2510A CDC2509A CDC2509PWR CDC2510
    Text: CDC2509 3.3-V PHASE-LOCK LOOP CLOCK DRIVER SCAS580B – OCTOBER 1996 – REVISED JULY 2001 D D D D D D D D PW PACKAGE TOP VIEW Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications Distributes One Clock Input to One Bank of Five and One Bank of Four Outputs


    Original     		CDC2509 SCAS580B 24-Pin CDC2509 CDC2510A CDC2509A CDC2509PWR CDC2510 PDF

    Untitled

    Abstract: No abstract text available
    Text: CDC2587 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _ SCAS560B - DECEMBER 1996 - REVISED JULY 1996 • • • • • • • DQQ PACKAGE TOP VIEW CLKIN VREF FBIN Vcc FBOUT GND Vcc 1Y0 1Y1 GND VCC 1Y2 1Y3 GND V cc 2Y0 2Y1 GND V cc


    OCR Scan     		CDC2587 SCAS560B 25-C1 7526S PDF