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    CD74FCT844A

    Abstract: CD74FCT844AEN
    Text: CD74FCT844A BiCMOS 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS728 – JULY 2000 D D D D D D D D D EN PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Inverted Outputs Input/Output Isolation From VCC Controlled Output Edge Rates


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    CD74FCT844A SCBS728 48-mA CD74FCT844A CD74FCT844AEN PDF

    Untitled

    Abstract: No abstract text available
    Text: CD74FCT844A BiCMOS 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS728 – JULY 2000 D D D D D D D D D EN PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Inverted Outputs Input/Output Isolation From VCC Controlled Output Edge Rates


    Original
    CD74FCT844A SCBS728 48-mA PDF

    Untitled

    Abstract: No abstract text available
    Text: CD74FCT844A BiCMOS 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS728 – JULY 2000 D D D D D D D D D EN PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Inverted Outputs Input/Output Isolation From VCC Controlled Output Edge Rates


    Original
    CD74FCT844A SCBS728 48-mA CD74FCT844A PDF

    Untitled

    Abstract: No abstract text available
    Text: CD74FCT844A BiCMOS 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS728 − JULY 2000 D BiCMOS Technology With Low Quiescent D D D D D D D D EN PACKAGE TOP VIEW Power Buffered Inputs Inverted Outputs Input/Output Isolation From VCC Controlled Output Edge Rates


    Original
    CD74FCT844A SCBS728 48-mA PDF

    Untitled

    Abstract: No abstract text available
    Text: CD74FCT844A BiCMOS 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS728 − JULY 2000 D BiCMOS Technology With Low Quiescent D D D D D D D D EN PACKAGE TOP VIEW Power Buffered Inputs Inverted Outputs Input/Output Isolation From VCC Controlled Output Edge Rates


    Original
    CD74FCT844A SCBS728 48-mA CD74FCT844A PDF

    Untitled

    Abstract: No abstract text available
    Text: CD74FCT844A BiCMOS 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS728 − JULY 2000 D BiCMOS Technology With Low Quiescent D D D D D D D D EN PACKAGE TOP VIEW Power Buffered Inputs Inverted Outputs Input/Output Isolation From VCC Controlled Output Edge Rates


    Original
    CD74FCT844A SCBS728 48-mA PDF