Untitled
Abstract: No abstract text available
Text: SMART SM5640230UUXUGU Modular Technologies March 31, 1997 16MByte 2M x 64 DRAM Module - 1Mx16 based 168-pin DIMM, Buffered Features Part Numbers • • • • • • • • • • • SM56402300UXUGU SM56402301UXUGU SM56402308UXUGU SM56402309UXUGU
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SM5640230UUXUGU
16MByte
1Mx16
168-pin
SM56402300UXUGU
SM56402301UXUGU
SM56402308UXUGU
SM56402309UXUGU
60/70/80ns
400mil
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Untitled
Abstract: No abstract text available
Text: SM5643285D4N0UU May 4, 2000 Revision History • May 4, 2000 Modified AC characteristics. • April 20, 2000 Datasheet released. Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel: 510 623-1231 • Fax:(510) 623-1434 • E-mail: [email protected]
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SM5643285D4N0UU
256MByte
16Mx8
184-pin
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Untitled
Abstract: No abstract text available
Text: SMART SM5640280UUNUGU Modular Technologies February 10, 1999 Revision History • February 10, 1999 Modified functional diagram on page 2. • May 6, 1998 Datasheet released Corporate Headquarters: 4305 Cushing Pkwy., Fremont, CA 94538, USA • Tel: 510 623-1231 • Fax:(510) 623-1434 • E-mail: [email protected]
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SM5640280UUNUGU
16MByte
168-pin
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Untitled
Abstract: No abstract text available
Text: SM564043574NWUP January 15, 2001 Revision History • January 15, 2001 Modified datasheet. • May 9, 2000 Added Command Truth Table, Mode Register Table and notes. Modified waveforms Auto Refresh (CBR cycle and Power Down Mode and Clock Mask). • August 23, 1999
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SM564043574NWUP
PC-100
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SG5642885D8N0CL
Abstract: No abstract text available
Text: SU5642885D8N0CU June 27, 2006 Ordering Information Part Numbers Description Module Speed SM5642885D8N0CL 128Mx64 1GB , DDR, 184-pin DIMM, Unbuffered, Non-ECC, 64Mx8 Based, DDR333B, 31.75mm, 22Ω DQ termination. PC2700 @ CL 2.5 SX5642885D8N0CL 128Mx64 (1GB), DDR, 184-pin DIMM, Unbuffered, Non-ECC,
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SU5642885D8N0CU
SM5642885D8N0CL
SX5642885D8N0CL
128Mx64
184-pin
64Mx8
DDR333B,
SG5642885D8N0CL
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Untitled
Abstract: No abstract text available
Text: SM564324574X0BU May 31, 2000 Revision History • May 31, 2000 Added Command Truth Table, Mode Register Table and notes. Modified waveforms Auto Refresh (CBR cycle and Power Down Mode and Clock Mask). • June 11, 1999 Modified datasheet part number from SM564324574X6BU to SM564324574X0BU.
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SM564324574X0BU
SM564324574X6BU
SM564324574X0BU.
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SM564168574N0BS
Abstract: No abstract text available
Text: SM564168574N0BS February 26, 2002 Orderable Part Numbers Module Part Number SM564168574N0BS Description 16Mx64 128MB , SDRAM, 168-pin DIMM, Unbuffered, 16Mx8 Based, PC133, CL=2&3, 34.93mm. Revision History • February 26, 2002 Datasheet released. Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: [email protected]
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SM564168574N0BS
SM564168574N0BS
16Mx64
128MB)
168-pin
16Mx8
PC133,
128MByte
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Untitled
Abstract: No abstract text available
Text: SU5646485D8N0CU June 27, 2006 Ordering Information Part Numbers Description Module Speed SM5646485D8N0CL 64Mx64 512MB , DDR, 184-pin DIMM, Unbuffered, Non-ECC, 64Mx8 Based, DDR333B, 31.75mm, 22Ω DQ termination. PC2700 @ CL 2.5 SG5646485D8N0CL 64Mx64 (512MB), DDR, 184-pin DIMM, Unbuffered,
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SU5646485D8N0CU
SM5646485D8N0CL
64Mx64
512MB)
184-pin
64Mx8
DDR333B,
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Untitled
Abstract: No abstract text available
Text: SM564X260B1NWBU April 7, 2000 Revision History • April 7, 2000 Corrected physical dimensions description on page 4. • November 11, 1998 Modified physical dimensions on pg. 2 and 4. • March 12, 1998 Datasheet released. Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel: 510 623-1231 • Fax:(510) 623-1434 • E-mail: [email protected]
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SM564X260B1NWBU
256Kx32
144-pin
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Untitled
Abstract: No abstract text available
Text: SM564083574NZ3R January 11, 2002 Orderable Part Numbers Module Part Number SM564083574NZ3R Description 8Mx64 64MB , SDRAM, 144-pin SODIMM Unbuffered, 8Mx16 Based, CL3, PC133 Revision History • January 11, 2001 Datasheet released. Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: [email protected]
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SM564083574NZ3R
8Mx64
144-pin
8Mx16
PC133
64MByte
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Untitled
Abstract: No abstract text available
Text: SM564168574N9BU May 3, 2001 Revision History • May 3, 2001 Modified datasheet. • May 8, 2000 Added Command Truth Table, Mode Register Table and notes. Modified waveforms Auto Refresh (CBR cycle and Power Down Mode and Clock Mask). • October 14, 1998
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SM564168574N9BU
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Untitled
Abstract: No abstract text available
Text: SMART SM5640830UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Changed physical dimensions from inches to mm page 11 . • October 6, 1997 Datasheet released. Corporate Headquarters: 4305 Cushing Pkwy., Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: [email protected]
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SM5640830UUNWGU
64MByte
4Mx16
144-pin
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SG564323578NW3R
Abstract: SM564323578NW3R
Text: SU564323578NW3R February 16, 2006 Ordering Information Part Numbers Description SM564323578NW3R 32Mx64 256MB , SDRAM, 144-pin SODIMM, Unbuffered, Non-ECC, 16Mx16 Based, PC133, CL 3.0, 31.75mm. SG564323578NW3R 32Mx64 (256MB), SDRAM, 144-pin SODIMM, Unbuffered, Non-ECC, 16Mx16 Based,
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SU564323578NW3R
SM564323578NW3R
SG564323578NW3R
32Mx64
256MB)
144-pin
16Mx16
PC133,
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Untitled
Abstract: No abstract text available
Text: SM564328578NWUU May 3, 2001 Revision History • May 3, 2001 Modified datasheet. • May 9, 2000 Added Command Truth Table, Mode Register Table and notes. Modified waveforms Auto Refresh (CBR cycle and Power Down Mode and Clock Mask). • February 17, 2000
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SM564328578NWUU
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Untitled
Abstract: No abstract text available
Text: SM564083574NW3R June 28, 2001 Revision History • June 28, 2001 Added new DC Characteristics Table on page 6. Added new AC Characteristics Table on page 7. Modified Ordering Information Cycle Time on page 16. • May 3, 2001 Modified note 3 on page 2. • May 9, 2000
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SM564083574NW3R
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1376408-1
Abstract: No abstract text available
Text: SU5646485D8NRCU01 September 23, 2004 Ordering Information Part Numbers Description Module Speed SM5646485D8NRCG01 64Mx64 512MB , DDR, 200-pin SO-DIMM, Unbuffered, PLL, Non-ECC, 64Mx8 Based (Stacked - two 32Mx8), DDR266A, 35.56mm, 22Ω DQ termination. PC2100 @ CL 2.0, 2.5
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SU5646485D8NRCU01
SM5646485D8NRCG01
64Mx64
512MB)
200-pin
64Mx8
32Mx8)
DDR266A,
32Mx64
256MB)
1376408-1
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SM5642885D8N0FN
Abstract: No abstract text available
Text: SU5642885D8N0FU June 27, 2006 Ordering Information Part Numbers Description Module Speed SM5642885D8N0FO 128Mx64 1GB , DDR, 184-pin DIMM, Unbuffered, Non-ECC, 64Mx8 Based, DDR400B, 31.75mm, 22Ω DQ termination. PC3200 @ CL 3.0 SG5642885D8N0FO 128Mx64 (1GB), DDR, 184-pin DIMM, Unbuffered, Non-ECC,
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SU5642885D8N0FU
SM5642885D8N0FO
SG5642885D8N0FO
128Mx64
184-pin
64Mx8
DDR400B,
SM5642885D8N0FN
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Untitled
Abstract: No abstract text available
Text: SM564X260B2NWBU April 7, 2000 Revision History • April 7, 2000 Corrected physical dimensions description on page 8. • May 12, 1999 Modified access time information on page 2. • November 11, 1998 Modified physical dimensions on page 8. • August 18, 1998
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SM564X260B2NWBU
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Untitled
Abstract: No abstract text available
Text: SM56402317UN6BU May 22, 2000 Revision History • May 22, 2000 Added Command Truth Table, Mode Register Table and notes. Modified waveforms Auto Refresh (CBR cycle and Power Down Mode and Clock Mask). • November 25, 1998 Changed datasheet part no. from SM56402317UN6UU to SM56402317UN6BU.
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SM56402317UN6BU
SM56402317UN6UU
SM56402317UN6BU.
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8MX16
Abstract: No abstract text available
Text: SM564163574NZBU May 3, 2001 Revision History • May 3, 2001 Modified datasheet. • May 8, 2000 Added Command Truth Table, Mode Register Table and notes. Modified waveforms Auto Refresh (CBR cycle and Power Down Mode and Clock Mask). • August 25, 1998
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SM564163574NZBU
128MByte
8MX16
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Untitled
Abstract: No abstract text available
Text: SM564328574N03R July 12, 2001 Revision History • July 12, 2001 Modified AC Characteristics tRCD on page 7. Modified Ordering Information (Cycle Time) on page 16. • January 4, 2001 Modified datasheet. • May 24, 2000 Added Command Truth Table, Mode Register Table and notes.
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SM564328574N03R
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Untitled
Abstract: No abstract text available
Text: SU5646485D8N6FU June 27, 2006 Ordering Information Part Numbers Description Module Speed SM5646485D8N6FO 64Mx64 512MB , DDR, 184-pin DIMM, Unbuffered, Non-ECC, 32Mx8 Based, DDR400B, 31.75mm, 22Ω DQ termination. PC3200 @ CL 3.0 SG5646485D8N6FO 64Mx64 (512MB), DDR, 184-pin DIMM, Unbuffered, Non-ECC,
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SU5646485D8N6FU
SM5646485D8N6FO
SG5646485D8N6FO
64Mx64
512MB)
184-pin
32Mx8
DDR400B,
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Untitled
Abstract: No abstract text available
Text: SM56402807UX6UU Preliminary B Revision History • May 31, 2000 Added Command Truth Table, Mode Register Table and notes. Modified waveforms Auto Refresh (CBR cycle and Power Down Mode and Clock Mask). • May 29, 1998 Preliminary datasheet released. Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: [email protected]
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SM56402807UX6UU
16MByte
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Untitled
Abstract: No abstract text available
Text: SU564328578N63R November 11, 2005 Ordering Information Part Numbers Description SM564328578N63R 32Mx64 256MB , SDRAM, 168-pin DIMM, Unbuffered, 32Mx8 Based, PC133, CL = 3.0, 34.93mm. SG564328578N63R 32Mx64 (256MB), SDRAM, 168-pin DIMM, Unbuffered, 32Mx8 Based, PC133, CL = 3.0,
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SU564328578N63R
SM564328578N63R
SG564328578N63R
32Mx64
256MB)
168-pin
32Mx8
PC133,
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