25TAC
Abstract: HYMP512U64
Text: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec. 2) Changed SPD typo #41 Apr. 2004 Corrected Pin assignment table & SPD typo (Byte #03, 14)
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HYMP512U64
8/HYMP512U72
128Mx64
128Mx72
240-pin
25TAC
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CK2102
Abstract: DDR2-400 DDR2-533 HYMP512U64 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names
Text: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec. 2) Changed SPD typo #41 Apr. 2004 Corrected Pin assignment table & SPD typo (Byte #03, 14)
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128Mx64
128Mx72
HYMP512U64
8/HYMP512U72
240-pin
CK2102
DDR2-400
DDR2-533
MO-237
PC2-3200
PC2-4300
DDR2 DIMM 240 pin names
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C6248
Abstract: No abstract text available
Text: SPD, Power Conditioning, PF Capacitors and Harmonic Filters Industrial Surge Protection Products 2.1 Surge Protection and Power Conditioning Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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CVX050/100
HCUE300â
CA08100004Eâ
V3-T2-77
C6248
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PC2-5300
Abstract: DDR2-400 DDR2-533 DDR2-667 MO-237 PC2-3200 PC2-4300
Text: 64Mx72 bits DDR2 SDRAM Registered DIMM HYMP264R72 L 4 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo. Apr. 2004 Corrected Pin assignment table Nov. 2004 Remark
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64Mx72
HYMP264R72
240-pin
PC2-5300
DDR2-400
DDR2-533
DDR2-667
MO-237
PC2-3200
PC2-4300
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PS 229
Abstract: No abstract text available
Text: 32Mx64 bits Unbuffered DDR2 SDRAM Lead-Free DIMM HYMP532U64 L P6 Revision History No. 0.1 History Draft Date Defined Target Spec. Apr. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Designated Pin Cap. Spec. Aug. 2004 Remark
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HYMP532U64
32Mx64
HYMP532U646
240-pin
PS 229
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MO-237
Abstract: DDR2-400 DDR2-533 DDR2-667 PC2-3200 PC2-4300 PC2-5300
Text: 128Mx72 bits DDR2 SDRAM Registered DIMM HYMP512R72 L 4 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo(byte #22,#42) Apr. 2004 Corrected Pin assignment table
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128Mx72
HYMP512R72
240-pin
MO-237
DDR2-400
DDR2-533
DDR2-667
PC2-3200
PC2-4300
PC2-5300
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DDR2-400
Abstract: DDR2-533 DDR2-667 MO-237 PC2-3200 PC2-4300 PC2-5300
Text: 64Mx72 bits DDR2 SDRAM Registered DIMM HYMP264R72 L 8 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo(Bye #22) Apr. 2004 Corrected Pin assignment table Nov. 2004
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64Mx72
HYMP264R72
240-pin
DDR2-400
DDR2-533
DDR2-667
MO-237
PC2-3200
PC2-4300
PC2-5300
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DDR2-400
Abstract: DDR2-533 MO-237 PC2-3200 PC2-4300 HYmp564u64p8
Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM Pb-FREE DIMM HYMP564U64P8/HYMP564U72P8 Revision History No. 0.1 History Draft Date Defined Target Spec. May. 2004 Corrected Pin assignment table & SPD table. July 2004 This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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64Mx64
64Mx72
HYMP564U64P8/HYMP564U72P8
HYMP564U64
240-pin
DDR2-400
DDR2-533
MO-237
PC2-3200
PC2-4300
HYmp564u64p8
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Untitled
Abstract: No abstract text available
Text: 256Mx72 bits DDR2 SDRAM Registered DIMM HYMP125R72 L M4 Revision History No. History Draft Date 0.1 Initial Release Mar. 2004 0.2 Corrected IDD Spec. & SPD typo (byte #22,#30) May. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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256Mx72
HYMP125R72
240-pin
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Untitled
Abstract: No abstract text available
Text: 32Mx64 bits Unbuffered DDR2 SDRAM DIMM HYMP532U64 L 6 Revision History No. 0.1 History Draft Date Defined Target Spec. Mar. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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32Mx64
HYMP532U64
HYMP532U646
240-pin
HYMP532U648
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A1000
Abstract: A1001 A1051 A1052 A1053 A1054 A1101 A1103 HC12 a2305
Text: How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217, 1–800–441–2447 or 1-303-675-2140. Customer Focus Center: 1–800–521–6274 JAPAN: Motorola Japan Ltd.; SPD, Strategic Planning Office, 141, 4–32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan, 03–5487–8488
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HC05/HC08
MCUEZDBG0508/D
A1000
A1001
A1051
A1052
A1053
A1054
A1101
A1103
HC12
a2305
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a2305
Abstract: a1001 c133 A13007 CI 7433 A2306 a2333 a13001 A1000 touch-tone decoder A1052
Text: How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217, 1–800–441–2447 or 1-303-675-2140. Customer Focus Center: 1–800–521–6274 JAPAN: Motorola Japan Ltd.; SPD, Strategic Planning Office, 141, 4–32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan, 03–5487–8488
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HC05/HC08
MCUEZDBG0508/D
a2305
a1001 c133
A13007
CI 7433
A2306
a2333
a13001
A1000
touch-tone decoder
A1052
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KMM377S1620CTH-G8
Abstract: KMM377S1620CTH-GH KMM377S1620CTH-GL 1818-7329
Text: SDRAM MODULE KMM377S1620CTH KMM377S1620CTH SDRAM DIMM Intel 1.0 ver. Base 16Mx72 SDRAM DIMM with PLL & Register based on 16Mx4, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S1620CTH is a 16M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung KMM377S1620CTH consists of eighteen CMOS 16Mx4
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KMM377S1620CTH
KMM377S1620CTH
16Mx72
16Mx4,
16Mx4
400mil
18-bits
24-pin
KMM377S1620CTH-G8
KMM377S1620CTH-GH
KMM377S1620CTH-GL
1818-7329
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Untitled
Abstract: No abstract text available
Text: 32Mx64 bits Unbuffered DDR2 SDRAM Lead-Free DIMM HYMP532U64 L P6 Revision History No. 0.1 History Draft Date Defined Target Spec. Apr. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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32Mx64
HYMP532U64
HYMP532U646
240-pin
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HY5PS1G421
Abstract: DDR2-400 DDR2-533 PC2-3200 PC2-4300 RA13 M4C5 M4C5 1
Text: 256Mx72 bits DDR2 SDRAM Registered DIMM HYMP125R72 L M4 Revision History No. 0.1 0.2 History Draft Date Initial Release Mar. 2004 Corrected IDD Spec. May. 2004 Corrected Pin assignment table & SPD typo(#42) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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256Mx72
HYMP125R72
240-pin
HY5PS1G421
DDR2-400
DDR2-533
PC2-3200
PC2-4300
RA13
M4C5
M4C5 1
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Untitled
Abstract: No abstract text available
Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP564U648/HYMP564U728 Revision History No. History Draft Date 0.1 Defined Target Spec. Jan. 2004 0.2 1 Added Pin Capacitance Spec. , 2) Corrected typos of SPD Byte # 22,40,41,63 Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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64Mx64
64Mx72
HYMP564U648/HYMP564U728
HYMP564U64
240-pin
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dm0165
Abstract: HYMP564U64 DDR2-400 DDR2-533 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names
Text: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP564U648/HYMP564U728 Revision History No. 0.1 0.2 History Draft Date Defined Target Spec. Jan. 2004 Added Pin Capacitance Spec. Apr. 2004 Corrected Pin assignment table & SPD. July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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64Mx64
64Mx72
HYMP564U648/HYMP564U728
HYMP564U64
240-pin
dm0165
DDR2-400
DDR2-533
MO-237
PC2-3200
PC2-4300
DDR2 DIMM 240 pin names
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Untitled
Abstract: No abstract text available
Text: 256Mx72 bits DDR2 SDRAM Registered DIMM HYMP125R72 L M4 Revision History No. 0.1 0.2 History Draft Date Initial Release Mar. 2004 Corrected IDD Spec. May. 2004 Corrected Pin assignment table & SPD typo(#42) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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PDF
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256Mx72
HYMP125R72
240-pin
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Untitled
Abstract: No abstract text available
Text: 64Mx72 bits DDR2 SDRAM Registered DIMM HYMP264R72 L 8 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo(Bye #22) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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64Mx72
HYMP264R72
240-pin
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Untitled
Abstract: No abstract text available
Text: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec., 2) Corrected a typo of SPD byte #41(tRC) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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PDF
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128Mx64
128Mx72
HYMP512U64
8/HYMP512U72
240-pin
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Untitled
Abstract: No abstract text available
Text: 128Mx72 bits DDR2 SDRAM Registered DIMM HYMP512R72 L 4 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo(byte #22,#42) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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128Mx72
HYMP512R72
240-pin
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DDR2-400
Abstract: DDR2-533 HYMP532U648 MO-237 PC2-3200 PC2-4300
Text: 32Mx64 bits Unbuffered DDR2 SDRAM DIMM HYMP532U64 L 6 Revision History No. 0.1 History Draft Date Defined Target Spec. Mar. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Designated Pin Cap. Spec. Aug. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
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32Mx64
HYMP532U64
HYMP532U646
240-pin
DDR2-400
DDR2-533
HYMP532U648
MO-237
PC2-3200
PC2-4300
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Untitled
Abstract: No abstract text available
Text: SERIES SPD 125 SPD125-332M SPD125-472M SPD125-103M SPD125-223M SPD125-473M SPD125-104M SPD125-224M SPD125-474M SPD125-684M SPD125-105M 3.3 4.7 10 22 47 100 220 470 680 1000 SPD127-103M SPD127-223M SPD127-473M SPD127-104M SPD127-224M SPD127-474M SPD127-684M
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OCR Scan
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SPD125-332M
SPD125-472M
SPD125-103M
SPD125-223M
SPD125-473M
SPD125-104M
SPD125-224M
SPD125-474M
SPD125-684M
SPD125-105M
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GMM26416233
Abstract: GMM26416233CNTG
Text: LG Semicon Co.,Ltd. REVISION HISTORY /Revision 1.0: July 1998 - Add PC100,7K 2-2-2 Specifications. - Update Icc Specifications. - Change Input Test Condition from 2.8/0.0V to 2.4/0.4V. - Added post SPD Information separately (7K/7J/10K) for Modules. - Add Minimum Capacitance Value for Component.
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PC100
7K/7J/10K)
GMM26416233CNTG
GMM26416233CNTG
64bits
GMM26416233
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