TXC-07905
Abstract: AU-AIS MSP SNCP BP-51H TXC-07905BRBG 421L BY274
Text: OED622 Device Dual STM-4/STM-1 Overhead Terminator, Tributary Processor and Cross-Connect with Integrated E1 Mapper TXC-07905 DATA SHEET DESCRIPTION: ™ The Optimized Edge Device, OED622, is a dual STM-4/STM-1 SDH framer and overhead terminator, virtual
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OED622
TXC-07905
TXC-07905-MB,
TU-12
TXC-07905
AU-AIS
MSP SNCP
BP-51H
TXC-07905BRBG
421L
BY274
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prbs parity checker and generator
Abstract: RGPI5 4-bit even parity checker circuit diagram BY339 relay cross reference AC03 nec SDH 209 XRT95L34 XRT95L34IV b20 p03
Text: áç PRELIMINARY XRT95L34 OC-12/STM-4, QUAD OC-3/STM-1 POS/ATM FRAMER WITH INTEGRATED CDR’S APRIL 2002 GENERAL DESCRIPTION The XRT95L34 is an OC-12/STM-4, Quad OC-3/ STM-1 POS/ATM Framer with integrated CDR’s. ATM direct mapping and cell delineation are supported, so
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XRT95L34
OC-12/STM-4,
XRT95L34
584-pin
prbs parity checker and generator
RGPI5
4-bit even parity checker circuit diagram
BY339
relay cross reference
AC03 nec
SDH 209
XRT95L34IV
b20 p03
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Untitled
Abstract: No abstract text available
Text: EtherPHAST -48 Plus Device OC-48/STM-16 SONET/SDH Ethernet Mapper TXC-06742 DATA SHEET PRODUCT PREVIEW TXC-06742-MB, Ed. 4 December 2005 FEATURES APPLICATIONS • 1x STS-48/STM-16 or 4x STS-12/STM-4 framer with TOH processing, 4x 622 LVDS line side interface
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OC-48/STM-16
TXC-06742
TXC-06742-MB,
STS-48/STM-16
STS-12/STM-4
AU-4-16c/AU-4-4c/AU-4/AU-3/TU-3
OC-12/4x
EtherPHAST-48
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ICS894D115I-04
Abstract: led clock circuit diagram ICS894D115I-01 ICS894D115AGI-04 ICS894D115I
Text: ICS894D115I-04 OC-12/STM-4 AND OC-3/STM-1 CLOCK/DATA RECOVERY DEVICE General Description Features The ICS894D115I-04 is a clock and data recovery circuit. The device is designed to extract the clock HiPerClockS signal from a NRZ-coded STM-4 OC-12/STS-12 or
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ICS894D115I-04
OC-12/STM-4
ICS894D115I-04
OC-12/STS-12)
led clock circuit diagram
ICS894D115I-01
ICS894D115AGI-04
ICS894D115I
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Untitled
Abstract: No abstract text available
Text: ICS894D115I-04 OC-12/STM-4 AND OC-3/STM-1 CLOCK/DATA RECOVERY DEVICE General Description Features The ICS894D115I-04 is a clock and data recovery circuit. The device is designed to extract the clock HiPerClockS signal from a NRZ-coded STM-4 OC-12/STS-12 or
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ICS894D115I-04
OC-12/STM-4
ICS894D115I-04
OC-12/STS-12)
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ICS894D115I-01
Abstract: tube OC3 ICS894D115BGI-01 ICS894D115I-04 ICS894D115I vsc8115 OC3 Tube
Text: ICS894D115I-01 OC-12/STM-4 AND OC-3/STM-1 CLOCK/DATA RECOVERY DEVICE General Description Features The ICS894D115I-01 is a clock and data recovery circuit. The device is designed to extract the clock HiPerClockS signal from a NRZ-coded STM-4 OC-12/STS-12 or
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ICS894D115I-01
OC-12/STM-4
ICS894D115I-01
OC-12/STS-12)
tube OC3
ICS894D115BGI-01
ICS894D115I-04
ICS894D115I
vsc8115
OC3 Tube
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OC3 Tube
Abstract: C813C Nippon capacitors
Text: PRELIMINARY ICS894D115I-01 OC-12/STM-4 AND OC-3/STM-1 CLOCK/DATA RECOVERY DEVICE General Description Features The ICS894D115I-01 is a clock and data recovery circuit. The device is designed to extract the clock HiPerClockS signal from a NRZ-coded STM-4 OC-12/STS-12 or
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OC-12/STM-4
ICS894D115I-01
OC-12/STS-12)
08MHz
52MHz)
44MHz
ICS894D115I
EPAD441764
OC3 Tube
C813C
Nippon capacitors
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Untitled
Abstract: No abstract text available
Text: ICS894D115I-01 OC-12/STM-4 AND OC-3/STM-1 CLOCK/DATA RECOVERY DEVICE General Description Features The ICS894D115I-01 is a clock and data recovery circuit. The device is designed to extract the clock HiPerClockS signal from a NRZ-coded STM-4 OC-12/STS-12 or
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ICS894D115I-01
OC-12/STM-4
ICS894D115I-01
OC-12/STS-12)
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E4 smd
Abstract: Diodes smd e4 TG04-TDK2NS TG04-TDK1N1 78P2253 STM-1
Text: SMD E4/STM-1/STS-3/OC-3 Modules SMD E4/STM-1/STS-3/OC-3 Modules HALO Electronics has developed this standard series of single and dual core devices to meet the requirements for E4, STM-1, STS-3 and OC-3 applications. Designed specifically to interface with the TDK 78P2253 transceiver. UL1950, IEC950 and EN60950
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78P2253
UL1950,
IEC950
EN60950
400MHz
TG04-TDK2NS
TG04-TDK1N1
E4 smd
Diodes smd e4
TG04-TDK2NS
TG04-TDK1N1
STM-1
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LXT6155
Abstract: smd 6287 SMD e4 w Diodes smd e4 E4 SMD TX3044 TX3044T T1162
Text: SONET/SDH Dual Line Interface Transformer for E4/STM-1 Applications Supports 139.264 E4 and 155.52 (STM-1) Mbps for Coded Mark Inversion (CMI) interfaces Designated to interface with Intel’s LXT6155 for use with 75Ω coaxial cable Excellent Return Loss performance
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LXT6155
TX3044
20mVrms,
100kHz
smd 6287
SMD e4 w
Diodes smd e4
E4 SMD
TX3044
TX3044T
T1162
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16 byte register VERILOG
Abstract: verilog code BIP-8 GR-253 GR-253-CORE STS12CFRM digital alarm clock vhdl code in modelsim alarm clock design of digital VHDL
Text: SONET/SDH STS-12c/STM-4 Framer MegaCore Function STS12CFRM July 2001 User Guide Version 1.01 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com A-UG-IPSTS12CFRM-1.01 SONET/SDH STS-12c/STM-4 Framer MegaCore Function (STS12CFRM) User Guide
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STS-12c/STM-4
STS12CFRM
-UG-IPSTS12CFRM-1
STS-12c/STM-4
STS12CFRM)
STS12c/STM-1
16 byte register VERILOG
verilog code BIP-8
GR-253
GR-253-CORE
STS12CFRM
digital alarm clock vhdl code in modelsim
alarm clock design of digital VHDL
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vhdl code for stm-1 sequence
Abstract: vhdl code for BIP-8 generator STM-1 verilog code BIP-8 rw0s ATM machine working circuit diagram using sonet vhdl 16 byte register VERILOG AIRbus Interface alarm clock design of digital VHDL vhdl code for 9 bit parity generator vhdl code stm-64
Text: SONET/SDH STS-3c/STM-1 Framer MegaCore Function STS3CFRM June 2001 User Guide Version 1.01 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com A-UG-IPSTS3CFRM-1.01 SONET/SDH STS-3c/STM-1 Framer MegaCore Function (STS3CFRM) User Guide
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smd 6287
Abstract: LXT6155 Diodes smd e4 E4 SMD TX3044 TX3044T R675
Text: SONET/SDH Dual Line Interface Transformer for E4/STM-1 Applications Supports 139.264 E4 and 155.52 (STM-1) Mbps for Coded Mark Inversion (CMI) interfaces Designed to interface with Intel’s LXT6155 for use with 75 Ω coaxial cable Excellent Return Loss performance
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LXT6155
TX3044
20mVrms,
100kHz
smd 6287
Diodes smd e4
E4 SMD
TX3044
TX3044T
R675
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Untitled
Abstract: No abstract text available
Text: SONET/SDH Dual Line Interface Transformer for E4/STM-1 Applications Supports 139.264 E4 and 155.52 (STM-1) Mbps for Coded Mark Inversion (CMI) interfaces Designated to interface with Intel’s LXT6155 for use with 75Ω coaxial cable Return Loss meets G.703 requirements
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LXT6155
TX3044
24MHz
TX3044T)
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LXT6155
Abstract: ST6200QNL mark code e4 diode
Text: SONET/SDH Dual Line Interface Transformer for E4/STM-1 Applications Supports 139.264 E4 and 155.52 (STM-1) Mbps for Coded Mark Inversion (CMI) interfaces Designed to interface with Intel’s LXT6155 for use with 75Ω coaxial cable Dual design supports transmit and receive circuitry
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LXT6155
ST6200QNL
20mVrms,
100kHz
ST6200QNL
mark code e4 diode
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234h
Abstract: GR-253 TRCV012G5 TRCV012G7 TTRN012G5 TTRN012G7
Text: Preliminary Data Sheet August 2000 TRCV012G5 2.5 Gbits/s and TRCV012G7 (2.5 Gbits/s and 2.7 Gbits/s) Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features • TRCV012G5 supports OC-48/STM-16 data rate ■ TRCV012G7 supports: — OC-48/STM-16 data rate
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TRCV012G5
TRCV012G7
TRCV012G5
OC-48/STM-16
TRCV012G7
DS00-234HSPL
DS00-154HSPL)
234h
GR-253
TTRN012G5
TTRN012G7
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Untitled
Abstract: No abstract text available
Text: Product Specification Single Mode 622 Mbit/s ATM/SDH/SONET 1x9 Transceiver Extended Temperature Range –40°C to 85°C V23826-H18-C366 PRODUCT FEATURES • Compliant with ATM, SONET OC-3, SDH STM-1 and SONET OC-12, SDH STM-4 • Meets mezzanine standard height of
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V23826-H18-C366
OC-12,
V23826-H18-C366
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a105 transistor
Abstract: ST6200T transistor a105 mark code e4 diode LXT6155 smd PULSE TRANSFORMER SMD 5 PIN CODE E4 a105 A105 Board a105 SMD transistor
Text: SONET/SDH Dual Line Interface Transformer for E4/STM-1 Applications Compliant with ITU-T/G.703 Supports 139.264 E4 and 155.52 (STM-1) Mbps for Coded Mark Inversion (CMI) interfaces Designed to interface with Level One’s LXT6155 for use with 75 W coaxial cable
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LXT6155
ST6200T
F-39270
a105 transistor
ST6200T
transistor a105
mark code e4 diode
smd PULSE TRANSFORMER
SMD 5 PIN CODE E4
a105
A105 Board
a105 SMD transistor
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c366
Abstract: V23826-H18-C366 stm4 infineon
Text: Fiber Optics DC/DC 3.3V Single Mode 622 MBd ATM/SDH/SONET 1x9 Transceiver Extended Temperature Range (–40°C to 85°C) V23826-H18-C366 Features • Compliant with ATM, SONET OC-3, SDH STM-1 and SONET OC-12, SDH STM-4 • Meets mezzanine standard height of 9.8 mm
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V23826-H18-C366
OC-12,
c366
V23826-H18-C366
stm4 infineon
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Untitled
Abstract: No abstract text available
Text: Fiber Optics V23826-H18-C366 Single Mode 622 Mbit/s ATM/SDH/SONET 1x9 Transceiver Extended Temperature Range –40°C to 85°C Features • Compliant with ATM, SONET OC-3, SDH STM-1 and SONET OC-12, SDH STM-4 • Meets mezzanine standard height of 9.8 mm
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V23826-H18-C366
OC-12,
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GG1Q
Abstract: No abstract text available
Text: DATASHEET PM PMC-970133 ISSUE2 PRELIMINARY 1 PMC-Sierra, Inc. PMS342 spbctra -155 SONET/SDH PA YLOAD EXTRACTOR/ALIGNER FEATURES • Monolithic SONET/SDH PAYLOAD EXTRACTOR/ALIGNER for use in STS-1 STM-0/AU3 , STS-3 (STM-1/AU3) or STS-3c (STM-1 /AU4) interface
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PMC-970133
PMS342
20x20
GG1Q
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Untitled
Abstract: No abstract text available
Text: DATA SHEET PM PMC-970133 ISSUE 4 1 PMC-Sierra, Inc. PM5342 s p e c t r a -155 SONET/SDH PA YLOAD EXTRACTOR/ALIGNER FEATURES • Monolithic SONET/SDH PAYLOAD EXTRACTOR/ALIGNER for use in STS-1 STM-0/AU3 , STS-3 (STM-1/AU3) or STS-3c (STM-1/AU4) interface applications, operating at serial interface speeds of up to 155.52 Mbit/s.
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PMC-970133
PM5342
20x20
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PDF
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diode GFP AA
Abstract: KT 208 sierra The SDH interface in AXE MQE vco ss19 810 DD107* CONVERTER WD 969 TAA 611 T12 ic tb 810 datasheet hp 9720
Text: D A TA S H E E T PM PM C -970133 IS S U E 2 n /K PR ELIM INA R Y 1 PMC-Sierra, Inc. PM5342 s p e c tra -155 SO N ET/SDH PA YLO AD EXTRACTO R/ALIG NER FEATURES • Monolithic SONET/SDH PAYLOAD EXTRACTOR/ALIGNER for use in STS-1 STM-0/AU3 , STS-3 (STM-1/AU3) or STS-3c (STM-1/AU4) interface
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pms342
spectra-155
pmc-970133
20x20
001G7L5
diode GFP AA
KT 208 sierra
The SDH interface in AXE
MQE vco
ss19 810
DD107* CONVERTER
WD 969
TAA 611 T12
ic tb 810 datasheet
hp 9720
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PDF
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Untitled
Abstract: No abstract text available
Text: DATA SHEET p iv PMC-930829 ISSUE 5 1 r PMC-Sierra, Inc. PM5312 sttx SONET/SDH TRANSPORT TERMINA TING TRANSCEIVER FEATURES • Monolithic SONET/SDH Transport Overhead Terminating Transceiver for use in STS-1, STS-3 STM-1 , or STS-12 (STM-4) line interface applications.
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PMC-930829
PM5312
STS-12
STS-12/STM-4
STS-12
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