NCR82077
Abstract: STP2001QFP RS232 mouse diagram STP2000QFP NCR85C30 microsparc STP2001 AM85C30 NCR SCSI 82077
Text: STP2001.frm Page 1 Monday, August 25, 1997 2:46 PM STP2001QFP July 1997 Slave I/O DATA SHEET Integrated SBus Interface Slave I/O Controller DESCRIPTION The STP2001Slave I/O Controller is a highly integrated, low-cost, low-power device designed for use in single-processor
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STP2001
STP2001QFP
STP2001Slave
STP2000
AM85C30,
160-Pin
NCR82077
STP2001QFP
RS232 mouse diagram
STP2000QFP
NCR85C30
microsparc
AM85C30
NCR SCSI
82077
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microsparc 1
Abstract: STP2001 STP2021PLCC
Text: STP2021 July 1997 PMC Power Management Controller DATA SHEET DESCRIPTION The STP2021 Power Management Controller brings power management to SBus-based systems. The STP2021 interfaces to the SBus via the byte-wide expansion bus EBus provided by the STP2001 Slave I/O Controller.
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STP2021
STP2021
STP2001
84-Lead
STP2021PLCC
84-Pin
microsparc 1
STP2021PLCC
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PA15
Abstract: PA19 STP2001 STP2200ABGA STP2210QFP STP2220ABGA STP2230SOP
Text: Preliminary STP2220ABGA July 1997 U2S UPA-to-SBus Interface DATA SHEET DESCRIPTION The STP2220ABGA U2S [1] device bridges UPA- UltraSPARC Port Architecture to the SBus. U2S, is the primary connection between the UPA port (including UltraSPARC-I processors and memory) and the SBus
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STP2220ABGA
STP2220ABGA
16-entry
STP2220ABGA-83
STP2220ABGA-100
PA15
PA19
STP2001
STP2200ABGA
STP2210QFP
STP2230SOP
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Untitled
Abstract: No abstract text available
Text: P200 -18/Ud STP210 - 18/Ud STP190 - 18/Ud 210 Watt Maximum Power SOLAR PANEL Features • High conversion efficiency based on leading innovative photovoltaic technologies • High reliability with guaranteed +/-3% power output tolerance, ensuring return on investment
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-18/Ud
STP210
18/Ud
STP190
18/Ud
25-year
IEC61215,
IEC61730,
000W/m2
00W/m2
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mb86904
Abstract: STP1012PGA STP1012PGA-85 microsparc RISC processor STP2001 SPARC v8 architecture BLOCK DIAGRAM MB8690 microsparc SPARC 7 sparc v8
Text: STP1012 July 1997 microSPARC -II DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface DESCRIPTION The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.
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STP1012
32-Bit
STP1012PGA-70A
STP1012PGA-85
STP1012PGA-110
mb86904
STP1012PGA
STP1012PGA-85
microsparc RISC processor
STP2001
SPARC v8 architecture BLOCK DIAGRAM
MB8690
microsparc
SPARC 7
sparc v8
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STP2210QFP
Abstract: STP2001 STP2220BGA ADR14 ADR19 STP2230SOP
Text: STP2210QFP July 1997 RIC Reset/Interrupt/Clock Controller DATA SHEET DESCRIPTION The STP2210QFP RIC supports the system resets, system interrupts, system scan, and system clock-control functions. These are independent blocks, designed onto the ASIC chip to save space and improve reliability.
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STP2210QFP
STP2210QFP
STP2001
STP2220BGA
ADR14
ADR19
STP2230SOP
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cmd1011
Abstract: STP2024QFP sun sparc pinout
Text: STP2202ABGA June 1998 DSC DATA SHEET Dual Processor System Controller DESCRIPTION The STP2202BGA is the Dual Processor System Controller, also referred to as DSC, used in a low-cost high-performing two-processor system. DSC’s primary functions are to provide data coherence control,
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STP2202ABGA
STP2202BGA
cmd1011
STP2024QFP
sun sparc pinout
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CS4231
Abstract: STP2001 STP2024
Text: STP2024 July 1997 APC System Logic Chip DATA SHEET DESCRIPTION The STP2024 System Logic Chip provides additional features for SBus based systems. It has two major logic blocks: an audio DMA controller and a glue logic block. The DMA controller consumes the bulk of the logic,
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STP2024
STP2024
32-bit
CS4231
120-Pin
STP1024PQFP
STP2001
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Untitled
Abstract: No abstract text available
Text: STP2021 S un M ic r o e l e c t r o n ic s J u ly 1997 PMC Power Management Controller DATA SHEET D e s c r ip t io n The STP2021 Power Management Controller brings power management to SBus-based systems. The STP2021 interfaces to the SBus via the byte-wide expansion bus EBus provided by the STP2001 Slave I/O Controller.
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STP2021
STP2021
STP2001
84-Lead
TP2021PLC
84-Pin
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82077
Abstract: floppy controller 44 pin
Text: S un M icro electro nics July 1997 Slave I/O DATA SHEET Integrated SBus Interface Slave I/O Controller D e s c r ip t io n The STP2001Slave I/O Controller is a highly integrated, low-cost, low-power device designed for use in sin gle-processor systems with an SBus interface. The STP2001 provides serial I/O for keyboard, mouse and
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STP2001Slave
STP2001
STP2000
AM85C30,
M0JRLI03
160-Pin
STP2001QFP
82077
floppy controller 44 pin
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Untitled
Abstract: No abstract text available
Text: S un M icroelectronics July 1997 PMC Power Management Controller DATA SHEET D e s c r ip t io n The STP2021 Power Management Controller brings power management to SBus-based systems. The STP2021 interfaces to the SBus via the byte-wide expansion bus EBus provided by the STP2001 Slave I/O Controller.
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STP2021
STP2001
STP2021
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NCR85C30
Abstract: No abstract text available
Text: STP2001.frm Page 1 Monday, August 25, 1997 2:46 PM S un M ic r o e l e c t r o n ic s J u ly 1 9 9 7 Slave I/O DATA SHEET Integrated SBus Interface Slave I/O Controller D e s c r ip t io n The STP2001Slave I/O Controller is a highly integrated, low-cost, low-power device designed for use in single-processor
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STP2001
STP2001Slave
STP2000
purposSTP2001QFP
160-Pin
STP2001Q
2001Q
NCR85C30
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Untitled
Abstract: No abstract text available
Text: # Bus SPAnessRC Tstnday STP2001 May 1995 STP2001 DATA SHEET S Javel/O ContiDJfer G e n e r a l D e s c r ip t io n The STP2001S]ave I/O Controller is a highly integrated, tow-cost, tow ^power device designed f e ru s in singtoprocessorsysten s with an SBus interface.The STP2001 provides a M I /O forkeyboard,
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STP2001
STP2001S
STP2001
STP2000M
85C30
10MHZ
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Untitled
Abstract: No abstract text available
Text: STP2021 S un M ic r o e l e c t r o n ic s J u ly 1997 PMC Power Management Controller DATA SHEET D e s c r ip t io n The STP2021 Power M anagem ent Controller brings power m anagem ent to SBus-based systems. The STP2021 interfaces to the SBus via the byte-w ide expansion bus EBus provided by the STP2001 Slave 1 /O Controller.
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STP2021
STP2021
STP2001
84-Lead
TP2021PLC
84-Pin
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lcd cross reference
Abstract: SME2411BGA SuperSPARC 805-0086-02 PMC cross reference STP2003QFP ATM622-S STP3010 STP2014QFP STP2024QFP
Text: S un M icroelectronics July 1997 Data Sheets listed by Product Name Cross Reference List Advanced PCI Bridge SME2411BGA ATM622-S SAR SME4050BGA 802-7894-02 Color LCD Controller STP3031 STP3031 Crossbar Switch XB1 STP2230SOP 802-7955-02 Dual System Controller
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ATM622-S
85/110MHz
UltraSPARC-1167
UltraSPARC-11
UltraSPARC-ll/300
Buffer-50
STP1030A
STP5111A-200
STP5110A-167
lcd cross reference
SME2411BGA
SuperSPARC
805-0086-02
PMC cross reference
STP2003QFP
STP3010
STP2014QFP
STP2024QFP
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STP2210QFP
Abstract: a6060 STP2220BGA
Text: S un M i c r o e l e c t r o n i c s July 1997 RIC DATA SHEET Reset/Interrupt/ Clock Controller D e s c r ip t io n The STP2210QFP RIC"’ supports the system resets, system interrupts, system scan, and system clock-control functions. These are independent blocks, designed onto the ASIC chip to save space and improve reliability.
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STP2210QFP
STP2210QFP
a6060
STP2220BGA
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microsparc 1
Abstract: STP2000QFP NCR89C100 SUN HOLD
Text: SPA RC T echrdogy Business STP2000 May 1995 ST P 2000 DATA SHEET Master 1/ O Controller D escription The STP2000 Master 1/ O Controller is an integrated SBus master device with built-in standard 1/ O capabilities for general purpose computing or embedded applications. The STP2000 directly interfaces
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STP2000
STP2000
STP2001
32-bit
STB3DS01
microsparc 1
STP2000QFP
NCR89C100
SUN HOLD
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upa64
Abstract: UPA128 STP221
Text: S un M icroelectronics July 1997 u se Uniprocessor System Controller DATA SHEET D e s c r ip t io n The Uniprocessor System Controller USC has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients.
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SS-10/SS-20-type
128-MB
225-pin
STP2200ABGA-83
STP2200ABGA-100
upa64
UPA128
STP221
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dps 298 cp 2
Abstract: 286 dram schematic 85A9 k2 dsc hen ng dps 298 cp UltraSPARC ii FRS 8C - 05 9V DC
Text: if 4 4 o Q O o < o o f O O O I O o o o < I O O O O ( 5 o ò o ° 5 ‘ o o < o Dual Processor System Controller (DSC) Prelim in ary Data Sheet O c to b e r 1 996 S T P 220 2B G A S un M icroelectronics October 1996 U lt r a S P A R C DATA SHEET - I/II
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STP2202BG
dps 298 cp 2
286 dram schematic
85A9
k2 dsc hen ng
dps 298 cp
UltraSPARC ii
FRS 8C - 05 9V DC
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STP221
Abstract: No abstract text available
Text: S un M ic r o e l e c t r o n ic » Reset/interrupt/Clock Controller RIC Data Sheet N ovem ber 1996 STP2210QFP Sun microsystems S T P 2 2 1 OQFP S un M ic r o e le c t r o n ic s N ovem ber 1996 _ RIC DATA SHEET R eset/Interrupt/ Clock Controller
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STP2210QFP
STP221
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XCM 06
Abstract: UltraSPARC ii STP2220BGA
Text: S un M i c r o e l e c t r o n i c » lis e Uniprocessor System Controller Data Sheet Decem ber 1996 STP2200BG A Sun microsystems S TP 2 2 0 0 B G A S un M ic r o elec tr o n ic s December 1996 use Uniprocessor System Controller DATA SHEET D esc r ip tio n
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STP2200BG
SS-10/SS-20-type
128-MB
XCM 06
UltraSPARC ii
STP2220BGA
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schematic diagram apc UPS
Abstract: ICS633 schematic diagram UPS APC IC-S573 AT12L UPA audio analyzer AT12N apc ups schematic STP2002
Text: S un M icro electro nics July 1997 _DSC D A TA SH E E T D ual Processor System Controller D e s c r ip t io n The STP2202BGA is the Dual Processor System Controller, also referred to as DSC, used in a low-cost high-performing two-processor system. DSC's primary functions are to provide data coherence control,
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STP2202BGA
PINA02Y
PINA02Y
schematic diagram apc UPS
ICS633
schematic diagram UPS APC
IC-S573
AT12L
UPA audio analyzer
AT12N
apc ups schematic
STP2002
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ic master 1997
Abstract: No abstract text available
Text: ÜG July 1997 Master I/O 32-bit SBus Master I/O Controller DATA SHEET D e s c r ip t io n The STP2000 Master I/O Controller is an integrated SBus master device with built-in standard I/O capabili ties for general purpose computing or embedded applications. The STP2000 directly interfaces the CPU
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STP2000
STP2001
32-bit
Df13j
160-Lead
ic master 1997
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supersparc
Abstract: STP2003QFP STP3010PGA 805-0086-02 lcd cross reference STP2013 PMC cross reference STP3010 ATM622-S STP2024QFP
Text: S un M icroelectronics July 1997 Data Sheets listed by Marketing Part Cross Reference List M a r k e t in g P a r t 501-4126 Fast Frame Buffer 3D 802-7509-02 501-4127 Fast Frame Buffer (2D) 802-7509-02 SME1040BGA UltraSPARC-ll/ 300 MHz 805-0086-02 SME2411BGFA
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SME1040BGA
SME2411BGFA
SME4050BGA
STP1012PGA-85,
STP1021APGA
STP1030A
STP1031
LGA-250
STP1080A
STP1081
supersparc
STP2003QFP
STP3010PGA
805-0086-02
lcd cross reference
STP2013
PMC cross reference
STP3010
ATM622-S
STP2024QFP
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