SY100S324JCTR Search Results

SY100S324JCTR Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
SY100S324JCTR		Micrel Semiconductor	LOW POWER HEX TTL-to-ECL TRANSLATOR		Original	PDF
SY100S324JC-TR		Microchip Technology	Integrated Circuits (ICs) - Logic - Translators, Level Shifters - IC TRNSLTR UNIDIRECTIONAL 28PLCC		Original	PDF
SY100S324JCTR		Synergy Semiconductor	Low Power Hex TTL-to-ECL Translator		Scan	PDF
SY100S324JCTR		Synergy Semiconductor	LOW POWER HEX TTL-to-ECL TRANSLATOR		Scan	PDF
SY100S324JCTR		Synergy Semiconductor	LOW POWER HEX TTL-to-ECL TRANSLATOR		Scan	PDF

SY100S324JCTR Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
F100K Abstract: SY100S324 SY100S324JC SY100S324JCTR Text: LOW POWER HEX TTL-to-ECL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S324 SY100S324 Max. propagation delay of 1.4ns IEE min. of –70mA Industry standard 100K ECL levels Extended supply voltage option: VEE = –4.2V to –5.5V	Original	SY100S324 F100K 28-pin SY100S324 M9999-042307 F100K SY100S324JC SY100S324JCTR	PDF
F100K Abstract: SY100S324 SY100S324FC SY100S324JC SY100S324JCTR q-0316 Text: LOW POWER HEX TTL-to-ECL TRANSLATOR FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used as an inverting/non-inverting translator or as	Original	SY100S324 J28-1 F24-1 SY100S324JC SY100S324JCTR SY100S324 F24-1) F100K SY100S324FC SY100S324JC SY100S324JCTR q-0316	PDF
Untitled Abstract: No abstract text available Text: LOW POWER HEX TTL-to-ECL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S324 SY100S324 Max. propagation delay of 1.4ns IEE min. of –70mA Industry standard 100K ECL levels Extended supply voltage option: VEE = –4.2V to –5.5V	Original	SY100S324 F100K 28-pin SY100S324 M9999-042307	PDF
F100K Abstract: SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR Text: SYNERGY SY100S324 LOW POWER HEX TTL-to-ECL TRANSLATOR SEMICONDUCTOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION • Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL	Original	SY100S324 SY100S324 00S324 SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1 F100K SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR	PDF
F100K Abstract: SY100S324 SY100S324FC SY100S324FCTR SY100S324JC Text: LOW POWER HEX TTL-to-ECL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S324 SY100S324 Max. propagation delay of 1.4ns IEE min. of –70mA Industry standard 100K ECL levels Extended supply voltage option: VEE = –4.2V to –5.5V	Original	SY100S324 F100K 24-pin 28-pin SY100S324 M9999-061306 F100K SY100S324FC SY100S324FCTR SY100S324JC	PDF
Untitled Abstract: No abstract text available Text: LOW POWER HEX TTL-to-ECL TRANSLATOR FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used as an inverting/non-inverting translator or as	Original	SY100S324 J28-1 SY100S324JC SY100S324JCTR SY100S324 F24-1) J28-1)	PDF
LD 757 ps Abstract: No abstract text available Text: * LOW POW ER HEX TTL-to-ECL TRANSLATO R SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. The inputs are TTL com patible with diffe re n tia l o utputs that can e ith e r be	OCR Scan	SY100S324 F100K SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR D24-1 F24-1 LD 757 ps	PDF
D121D Abstract: 100S324 D2627 Text: * L O W P O W E R HEX TTL-i d-ECl . T R A N S L A T O R SYNERGY w 100S 324 S E M IC O N D U C T O R FEATURES • Max. propagation delay of 1.4ns ■ IEE min. of -70m A ■ Industry standard 100K ECL levels ■ Extended supply voltage option: V ee = -4.2V to -5.5V	OCR Scan	F100K 24-pin 28-pin SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR D24-1 F24-1 D121D 100S324 D2627	PDF
Untitled Abstract: No abstract text available Text: * LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be	OCR Scan	SY100S324 SY100S324 SY100S324DC D24-1 SY100S324FC F24-1 100S324JC J28-1 SY100S324JCTR	PDF
F100K Abstract: SY100S324 SY100S324DC SY100S324FC SY100S324JC 01oT Text: LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERG Y SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns IEE min. of -70mA Industry standard 100K ECL levels Extended supply voltage option: Vee = -4.2V to -5.5V Differential outputs Voltage and temperature compensation for	OCR Scan	SY100S324 -70mA F100K 24-pin 28-pin SY100S324 J28-1) F100K SY100S324DC SY100S324FC SY100S324JC 01oT	PDF
Untitled Abstract: No abstract text available Text: * LOW POW ER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns IEE min. of -70m A Industry standard 100K ECL levels Extended supply voltage option: V ee = -4.2V to -5.5V Differential outputs Voltage and temperature compensation for	OCR Scan	SY100S324 F100K 24-pin 28-pin SY100S324	PDF
F100K Abstract: SY100S324 SY100S324DC D2418 Text: * LOW PO W ER HEX TTL-to-E C L TRANSLATO R SYNERGY S E M IC O N D U C T O R FEATURES SY100S324 DESCRIPTION Max. propagation delay of 1,4ns min. of —70mA The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL	OCR Scan	SY100S324 F100K D24-1 TD013Ã 0DD21Ã SY100S324DC D24-1 SY100S324FC F24-1 F100K SY100S324 D2418	PDF
F100K Abstract: SY100S324 SY100S324FC D241 diode Text: ^001301 000232'ì bET «0» LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. T he inputs are TTL com patible w ith diffe re n tia l outputs th a t can e ither be	OCR Scan	SY100S324 -70mA F100K D24-1 1DD13Ã SY1OOS324DC D24-1 SY100S324FC F24-1 SY100S324JC F100K SY100S324 D241 diode	PDF
Untitled Abstract: No abstract text available Text: • 5 0 G 1 3 fll ÜDDSBST 1 2 e] WÊ L O W P O W E R H EX T T L -to -E C L T R A N S L A T O R SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns T h e S Y 1 0 0 S 3 2 4 is a h e x tra n s la to r d e s ig n e d to co n v e rt	OCR Scan	SY100S324 SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1 SY100S324JCTR	PDF