TIP 122 100 V
Abstract: MN673794
Text: LSI for MPEG MN673794 1. Overview This IC is used to process a variety of items including the following ones: NTSC/PAL signal Y/C and composite video I/O, 3D Y/C separation, TBC, DD conversion, frame sync, sync/clock generation, Rec 656 I/O. Features
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MN673794
CLK27I
R656IN7
R656IN0
CLK27O
R656OUT7
R656OUT0
CLK18O1
CLK18O2
LQFP208-P-2828
TIP 122 100 V
MN673794
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Untitled
Abstract: No abstract text available
Text: LSI for MPEG MN673794 1. Overview This IC is used to process a variety of items including the following ones: NTSC/PAL signal Y/C and composite video I/O, 3D Y/C separation, TBC, DD conversion, frame sync, sync/clock generation, Rec 656 I/O. M Di ain sc te
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MN673794
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SEKI ST 22
Abstract: MN673794 AGCO
Text: LSI for MPEG MN673794 1. Overview This IC is used to process a variety of items including the following ones: NTSC/PAL signal Y/C and composite video I/O, 3D Y/C separation, TBC, DD conversion, frame sync, sync/clock generation, Rec 656 I/O. nt in ue Pl
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MN673794
SEKI ST 22
MN673794
AGCO
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CCD97
Abstract: CCD97-00 scientific imaging technologies ccd97 pinhead
Text: CCD97–00 Front Illuminated 2-Phase IMO Series Electron Multiplying CCD Sensor INTRODUCTION The CCD97 is part of the new L3Vision2 range of products from e2v technologies. This device uses a novel output amplifier circuit that is capable of operating at an equivalent
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CCD97
CCD97FI
CCD97-00
scientific imaging technologies ccd97
pinhead
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LF3324
Abstract: line scan sensor synchronizer ccd cmos video delay line
Text: LF3324 Configurations Modes Applications Random Access X / Horiz. Address LF3324 D x8, x10, x12 Q 24Mbit 2-D Address Space option for simplified image access p Random Access Write with Sequential Read p Random Access Read with Sequential Write p (x8, x10, x12)
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LF3324
24Mbit
03/01/2005-LPB
324-A
LF3324
line scan sensor
synchronizer
ccd cmos
video delay line
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TH7818A
Abstract: No abstract text available
Text: TH7818A 50 MHz 1024 Pixels Linear CCD Datasheet 1. Features • • • • • • • • Data Rate up to 50 MHz Two Outputs at 25 MHz Each Pixel Size: 14 µm x 14 µm (14 µm Pitch) 250 to 1100 nm Spectral Range High Sensitivity and Lag-free Photodiodes
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TH7818A
websi914)
F-91572
TH7818A
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Untitled
Abstract: No abstract text available
Text: 19-1166; Rev 0; 12/96 Single-Chip, 8-Bit CCD Digitizer with Clamp and 6-Bit PGA _Applications _Features ♦ 1.0 Million Pixels/sec Conversion Rate ♦ Built-In Clamp Circuitry for Black-Level Correction or Correlated Double Sampling
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MAX1101
24-pin
MAX1101
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LF3312
Abstract: No abstract text available
Text: LF3312 Product Brief DEVICES INCORPORATED 12Mbit Frame Buffer / FIFO Providing designers with a single-chip approach to Sequential and Random Data Access FEATURES: Configurable 12,441,600-bit Memory - Allocate as Single/Dual Channels - Selectable Input/Output Word Widths
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LF3312
12Mbit
600-bit
83Mhz
12Mbit
6/04/2004-LPB
312-A
LF3312
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casio tv 1400
Abstract: LCD tv display pinout diagram ST20 boot Epson matrix ccd line BGA196 Casio 1.8 colour TFT Matrix CCD "line sensor" Epson ST20 manual SENSOR rgb f13 Casio 1.8" colour TFT
Text: STV0684 DIGITAL CAMERA PROCESSOR PRODUCT PREVIEW • Versatile mass storage interface Features ● ■ Supports the UXGA 1600 x 1200 pixels and SXGA (1280 x 1024 pixels) CMOS sensors from STMicroelectronics. ■ USB 1.1 interface ■ High quality video processor
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STV0684
casio tv 1400
LCD tv display pinout diagram
ST20 boot
Epson matrix ccd line
BGA196
Casio 1.8 colour TFT
Matrix CCD "line sensor" Epson
ST20 manual
SENSOR rgb f13
Casio 1.8" colour TFT
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"Brushless DC Motor" 400 WAT
Abstract: MARKING EA1 AN1149 PDIP20 SO20 ST7261 ST72611F1 ST72F611F1 ST72P611F1 TRANSISTOR MARKING CODE EA1
Text: ST7261 LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, FLASH MEMORY, LVD, WDG, TIMER PRODUCT PREVIEW • ■ ■ ■ ■ Memories – 4K Program memory ROM, FASTROM or Dual voltage FLASH with read-write protection. In-Circuit programming for Flash versions – 256 bytes RAM memory (128-byte stack)
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ST7261
128-byte
"Brushless DC Motor" 400 WAT
MARKING EA1
AN1149
PDIP20
SO20
ST7261
ST72611F1
ST72F611F1
ST72P611F1
TRANSISTOR MARKING CODE EA1
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AT76C610
Abstract: TS8388BF v2nob
Text: Features • • • • • • • • • • • • • • • • • Dual 6-bit Resolution 250 MHz Full-power Input Bandwidth 1 Gsps Sampling Rate SINAD = 36 dB Typ 5.7 ENOB – THD = -47 dB, SFDR = -50 dB at FS = 1 Gsps, FIN = 250 MHz 2-tone IMD: -41 dBc Min at 1 Gsps, F IN = 249 MHz, 251 MHz
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02/01/0M
AT76C610
TS8388BF
v2nob
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2N158
Abstract: germanium Power Transistor HD R 433 M MD-Z1 c 1031 hall effect transistor BCCMD Germanium power
Text: ● MIL.S.19500/24D 18 March 1970 SUPERSEDING MI L-s.19500/24c 14 May 1963 MILITARY SPECIFICATION SEMICONDUCTOR DEVICE, TRANSISTOR, PNP, GERMANIUM, POWER TYPE 2N 158 This specifimticm partmenls is mandatory nnd/lgcncics for use of the Department by .11 Ocof Dcfensc.
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19500/24D
19500/24c
CCU51DERED
2N158
germanium Power Transistor
HD R 433 M
MD-Z1
c 1031 hall effect transistor
BCCMD
Germanium power
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Untitled
Abstract: No abstract text available
Text: CXL1009P SONY* CMOS-CCD Signal Processor for TBC Package Outline Description CXL1009P is a CMOS-CCD signal processor developed for Time Base Corrector TBC . Unit: mm 20 pin DIP (Plastic) Features • Low power consumption 160 mW (Typ.) • Wide variable frequency range (15.2 to 27.2 MH2)
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CXL1009P
CXL1009P
DIP-20P-02
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CXL1009P
Abstract: cd 152m
Text: SONY» CXL10 0 9 P CMOS-CCD Signal Processor for TBC For the availability of this product, please contact the sales office Package Outline D escription CXL1009P is a CMOS-CCD signal processor developed for Time Base Corrector TBC . Features • Low power consumption 160 mW (Typ.)
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CXL1009P
CXL1009P
cd 152m
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tbc ccd
Abstract: No abstract text available
Text: D EVELO PM EN T DATA SAD7630 This data sheet contains advance inform ation and specifications are subject to change w ith o u t notice. _ TIME BASE CORRECTION DELAY LINE TBC G EN ERA L DESCRIPTION The SAD7630 is a charge-coupled device (CCD) dual variable delay line. It is designed for fault correction
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SAD7630
SAD7630
7Z24446
tbc ccd
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Untitled
Abstract: No abstract text available
Text: JTEXA R XR-T7288 CEPT1 Line Interface .the a n a lo g p lu s c o m p a n y June 1997-3 FEATURES Fully Integrated 2.048Mbits/s Line Interface Minimal External Circuitry Required Intended For Use In Systems That Must Comply With CCITT Specifications G.703, G .823,1.431,
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XR-T7288
048Mbits/s
or120Q
10OmW
108mW
XR-T7288
342Ebia
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ICO4
Abstract: LM 739 N
Text: XR-T7288 C 'E X A R [.the analog plus company CEPT1 Line Interface JM June 1997-3 FEATURES • Fully Integrated 2.048Mbits/s Line Interface • Minimal External Circuitry Required • Intended For Use In Systems That Must Comply With CCITT Specifications G.703, G.823, 1.431,
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XR-T7288
048Mbits/s
100mW
120i2
108mW
XR-T7288
ICO4
LM 739 N
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processor
Abstract: KS0118B KA9401 KA9413 SOP42 KA9421 servo rc KA9420 digital video signal processor KA9430
Text: FUNCTION GUIDE LINEAR ICs M. LDP APPLICATION PACKAGE KA9410 KA9412 KA9413 KA9414D KA9420 KA9421 KA9430 KA9431 KA9401 KA9490 KS0118B 42 SDIP 42 SDIP 100 QFP 30 SOP 42 SDIP 100 QFP 42 SDIP 48 SDIP 80 QFP 9 SIP 80 QFP FUNCTION Video Signal Processor NTSC / PAL Video Signal Processor
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KA9410
KA9412
KA9413
KA9414D
KA9420
KA9421
KA9430
KA9431
KA9401
KA9490
processor
KS0118B
SOP42
servo rc
digital video signal processor
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Untitled
Abstract: No abstract text available
Text: □□□ □ □□ □ □ DEVICES INCORPORATED □ □ □ □ □□ □ □ □ □ □ □ □□ □ □ □ □ □ □ □ □ □ □ □ □ □□ □ □ □□ □□ □□ LF3324 □□ DD □DddDDdd □□ □ □ □ □□ Product Brief
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LF3324
24Mbit
200-bit
74Mhz
24Mbit
03/01/2005-LPB
324-A
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type fh motor
Abstract: ccd sensor driver AN6040 AN3893NFHP ZIP014-P-0300 panasonic cmos image sensor MN66262 B112 MN3110
Text: ICs/LSIs for VCR, Camera •For Video Camera continued Category Motor driver Type No. Operating Voltage (V) Others Functions Package No. AN3815K 4.5 to 5.5 VCR cylinder motor drive circuit SDIP018-P-0550 B43 AN3890FBS 4.5 to 5.5 VCR capstan motor drive circuit
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AN3815K
AN3890FBS
SDIP018-P-0550
QFH036-P-0710
048-P-0707A
AN3893NFHP
AN3895FHQ
AN6663S/SP
AN6664S
LQFP064-P-1010
type fh motor
ccd sensor driver
AN6040
ZIP014-P-0300
panasonic cmos image sensor
MN66262
B112
MN3110
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MN3110
Abstract: AN6041 SSIP004-P-0000A encoder B58 AN3959FHP MN3107CS
Text: ICs/LSIs for VCR, Camera • For Video Camera continued Category Type No. Operating Voltage Process Functions Package No. (V) Motor driver AN3815K 4.5 ~ 5.5 VTR cylinder motor drive circuit SDIP018-P-0550 B52 AN3890FBS 4.5 - 5 .5 VTR capstan motor drive circuit
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AN3815K
AN3890FBS
AN3893FHP
AN8360NK
HH8360
SDIP024-P-0300
SIL-13
N66262
MN88101
QFP064-P-1414
MN3110
AN6041
SSIP004-P-0000A
encoder B58
AN3959FHP
MN3107CS
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Untitled
Abstract: No abstract text available
Text: MOSEL MS88128 128K x 8 CMOS Static RAM Module FEATURES DESCRIPTION • Compatible with JEDEC standard pinout for monolithic megabit 128K x 8 The Mosel M S88128 is a 1 Megabit 1,048,576 bits static random access memory module organized as 128K (131,072) words by 8 bits. It is built using four surface
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MS88128
250mW
S88128
MS88128
PID023
MS88128-10PC
MS88128-12PC
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Untitled
Abstract: No abstract text available
Text: PARADIGM P R E L I M I N A R Y 1 Megabit Static RAM 256K x 4-Bit with Fast Sequential Access Mode 1 PSM44028S PSM44028L Features Description □ MIPS R4000 support □ High speed access times Com'l: 20,25, and 35ns M il: 20, 25, 35, and45ns □ Low power operation
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PSM44028S
PSM44028L
R4000
and45ns
400mW
350mW
MIL-STD883,
PSM44028
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LC3517BL-15
Abstract: LC3517B-15 LC3517BL-12 LC3517BL 0G123
Text: SANYO SEMICONDUCTOR CORP b3E D • F TTTTOTb 0015332 «TSAJ LC3517B-10/12/15AC5517BL-10/12/15 No.2421 Asynchronous S ilic o n Gate CMOS LSI 2048 General Description- Wo r d s x 8 B i t s CMOS S t a t ic RAM - - - . . The LC3517B/BL are fully asynchronous silicon gate CMOS static RAMs organized
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LC3517B-10/12/15AC5517BL-10/12/15
LC3517B/BL
LC3517B
LC3517BL
LC3517BL-15
LC3517B-15
LC3517BL-12
0G123
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