IP67K
Abstract: ISO 11452-5 stripline TBD 234 V12 temposonics msr 008 sensor dimension
Text: Temposonics ® Magnetostrictive, Absolute, Non-contact Linear-Position Sensors SENSORS MH-Series Mobile Hydraulic External Sensor Model MSR Analog Output Document Part Number 551315 Revision B Data Sheet MH-Series Model MSR Sensor FEATURES •
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STM32F4
Abstract: STM32F405 stm32f407 STM32f4xx reference manual STM32F407VG STM32F407ZG stm32F4 cortex-m4 FT4066 STM32F4xx PM0081
Text: STM32F405xx STM32F407xx ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera Features • FBGA Core: ARM 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator ART
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STM32F405xx
STM32F407xx
210DMIPS,
Flash/192
32-bit
LQFP64
LQFP100
LQFP144
LQFP176
WLCSP90
STM32F4
STM32F405
stm32f407
STM32f4xx reference manual
STM32F407VG
STM32F407ZG
stm32F4 cortex-m4
FT4066
STM32F4xx
PM0081
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STM32F4
Abstract: STM32F40XXX STM32F417 STM32f4xx reference manual STM32F415 stm32F4 cortex-m4 DCMI timing specification stm32f417zg STM32F417vg LCD 320 240 EL
Text: STM32F415xx STM32F417xx ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera Features • FBGA Core: ARM 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator ART
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STM32F415xx
STM32F417xx
210DMIPS,
Flash/192
32-bit
LQFP64
LQFP100
LQFP144
LQFP176
WLCSP90
STM32F4
STM32F40XXX
STM32F417
STM32f4xx reference manual
STM32F415
stm32F4 cortex-m4
DCMI timing specification
stm32f417zg
STM32F417vg
LCD 320 240 EL
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STM32F41x
Abstract: STM32F417 measurement of voltage using adc stm32f4 STM32f4xx reference manual PM0081 NAND sample code for stm32f2xx stm32F4 cortex-m4 stm32f417vg UFBGA176 STM32F415
Text: STM32F415xx STM32F417xx ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera Datasheet − production data Features • ■ ■ ■ ● ■ ■ ■ ■ ■ FBGA Core: ARM 32-bit Cortex -M4 CPU with FPU,
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STM32F415xx
STM32F417xx
210DMIPS,
Flash/192
32-bit
64Kbyte
STM32F41x
STM32F417
measurement of voltage using adc stm32f4
STM32f4xx reference manual
PM0081
NAND sample code for stm32f2xx
stm32F4 cortex-m4
stm32f417vg
UFBGA176
STM32F415
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STM32F405
Abstract: STM32F407 STM32F407VG STM32F4 PM0081 STM32f4xx user manual DCMI timing specification UFBGA176 stm32F4 cortex-m4 WLCSP90
Text: STM32F405xx STM32F407xx ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera Datasheet − production data Features • ■ ■ ■ ● ■ ■ ■ ■ ■ FBGA Core: ARM 32-bit Cortex -M4 CPU with FPU,
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STM32F405xx
STM32F407xx
210DMIPS,
Flash/192
32-bit
64Kbyte
STM32F405
STM32F407
STM32F407VG
STM32F4
PM0081
STM32f4xx user manual
DCMI timing specification
UFBGA176
stm32F4 cortex-m4
WLCSP90
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STM8L151
Abstract: STM8L152R6 STM8L151C8 STM8L Reference Manual USART3 LCD 8x40 lcd 5421 pm0044 STM32L STM8L152R8
Text: STM8L151M8/R8/C8 STM8L151R6 STM8L152M8/R8/C8 STM8L152R6 8-bit ultralow power MCU, up to 64 KB Flash, up to 2KB data EEPROM RTC, LCD, timers, USARTs, I2C, SPIs, ADC, DAC, comparators Preliminary data Features • ■ ■ Operating conditions – Operating power supply: 1.65 to 3.6 V
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STM8L151M8/R8/C8
STM8L151R6
STM8L152M8/R8/C8
STM8L152R6
STM8L151
STM8L152R6
STM8L151C8
STM8L Reference Manual
USART3
LCD 8x40
lcd 5421
pm0044
STM32L
STM8L152R8
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624 CCGA
Abstract: RTAX2000 TBD 234 V12 CQFP verilog hdl code for triple modular redundancy
Text: Advanced v0.4 RTAX-S Family FPGAs Special Features for Space • • • • • • • • • • • Up to 10,752 SEU Hardened Flip-Flops Eliminate Software TMR Necessity >LET th 37 LET, GEO SEU Rate <10-10 Errors/Bit-Day Expected SRAM Upset Rate of <10-10 Errors/Bit-Day
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32-Bits
624 CCGA
RTAX2000
TBD 234 V12
CQFP
verilog hdl code for triple modular redundancy
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BC 247
Abstract: bc 149 c X1401 HP3070 PM7364 BC 251
Text: - PMC Sierra PM7364 FREEDM - 32 BSDL description - Written by: James Lamond - Verified electrically against PM7364 FREEDM-32 - Using HP3070 Boundary Scan S/W revision B.02.54 - PM7364 BSDL Revison: 04 - Hewlett Packard Canada Ltd - Revised for Rev D device by Richard Steedman, PMC
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PM7364
FREEDM-32
HP3070
pm7364;
BC 247
bc 149 c
X1401
BC 251
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G4 BC 30
Abstract: BC 247 TBD 234 V12 M9809 HP3070 PM5342 PM7366 X1631 X1-73 bc 205
Text: BSDL SOURCE CODE - PMC_Sierra_Cells for PMC - Sierra revision : VHDL Package and Package Body 1.0 created by : James Lamond Hewlett Packard Canada Ltd date : 20 December 1995 package PMC_Sierra_Cells is use STD_1149_1_1990.all; constant cele0 : CELL_INFO;
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PM7366
G4 BC 30
BC 247
TBD 234 V12
M9809
HP3070
PM5342
X1631
X1-73
bc 205
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RTAX2000
Abstract: footprint cqfp 280 RTAX1000S actel cqfp 84
Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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TM1019
RTAX2000
footprint cqfp 280
RTAX1000S
actel cqfp 84
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4x1K
Abstract: edac 96 pin edac connector footprint cqfp 132 833 T12
Text: Advanced v0.5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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TM1019
4x1K
edac 96 pin edac connector
footprint cqfp 132
833 T12
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Untitled
Abstract: No abstract text available
Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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STM32L152
Abstract: STM32L151 STM32L152xx STM32L15xxx Flash programming manual STM32L151C STM32L STM32L15xxx STM32L151RB VFQFN48 STM32L151xx
Text: STM32L151xx STM32L152xx Ultralow power ARM-based 32-bit MCU with up to 128 KB Flash, RTC, LCD, USB, USART, I2C, SPI, timers, ADC, DAC, comparators Preliminary data Features • ■ ■ Operating conditions – Operating power supply range: 1.65 V to 3.6 V without BOR or 1.8 V to 3.6 V (with
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STM32L151xx
STM32L152xx
32-bit
STM32L152
STM32L151
STM32L152xx
STM32L15xxx Flash programming manual
STM32L151C
STM32L
STM32L15xxx
STM32L151RB
VFQFN48
STM32L151xx
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w32 smd transistor
Abstract: rtax250sl RTAX2000S w32 smd transistor 143 41-bit Carry Look-ahead Adder RTAX2000SL RTAX4000S BY415 RTAX4000D LG1152
Text: Revision 14 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)
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TM1019
MIL-STD-883B
w32 smd transistor
rtax250sl
RTAX2000S
w32 smd transistor 143
41-bit Carry Look-ahead Adder
RTAX2000SL
RTAX4000S
BY415
RTAX4000D
LG1152
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624 CCGA
Abstract: CQ352 transistor prc 606 j rtax250 RTAX2000 rtax4000
Text: Revision 14 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)
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TM1019
624 CCGA
CQ352
transistor prc 606 j
rtax250
RTAX2000
rtax4000
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STM32 IWDG
Abstract: STM32L15XCX STM32L15xxx stm32l152v8 STM32L152xx VFQFN48 STM32L152RB TFBGA64 package tray STM32L15xxx Flash programming manual STM32L151
Text: STM32L151xx STM32L152xx Ultralow power ARM-based 32-bit MCU with up to 128 KB Flash, RTC, LCD, USB, USART, I2C, SPI, timers, ADC, DAC, comparators Preliminary data Features • ■ ■ Operating conditions – Operating power supply range: 1.65 V to 3.6 V without BOR or 1.8 V to 3.6 V (with
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STM32L151xx
STM32L152xx
32-bit
STM32 IWDG
STM32L15XCX
STM32L15xxx
stm32l152v8
STM32L152xx
VFQFN48
STM32L152RB
TFBGA64 package tray
STM32L15xxx Flash programming manual
STM32L151
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Untitled
Abstract: No abstract text available
Text: Revision 1 SmartFusion2 System-on-Chip FPGAs Microsemi’s SmartFusion 2 SoC FPGAs integrate fourth generation flash-based FPGA fabric, an ARM® Cortex -M3 processor, and high performance communications interfaces on a single chip. The SmartFusion2 family is the industry’s lowest power, most
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d 998
Abstract: LFX1200B-02F900I
Text: ispXPGA Family TM July 2002 Advance Data Sheet • Eight sysCLOCK Phase Locked Loops PLLs for Clock Management Features ■ Non-volatile, Infinitely Reconfigurable • • • • • • Instant-on - Powers up in microseconds via on-chip E2CMOS based memory
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255MHz
320MHz
250ps
414Kb
LFX1200B-05FE680C)
LFX1200B-04FE680I)
TN1028)
TN1003)
TN1000)
TN1026)
d 998
LFX1200B-02F900I
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RTAX250
Abstract: RTAX4000DL RTAX4000D CG624 RTAX4000S LG1152 TRANSISTOR TB 772 SL RTAX2000S ACTEL CCGA 624 mechanical transistor prc 606 j
Text: Revision 15 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)
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TM1019
RTAX250
RTAX4000DL
RTAX4000D
CG624
RTAX4000S
LG1152
TRANSISTOR TB 772 SL
RTAX2000S
ACTEL CCGA 624 mechanical
transistor prc 606 j
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Untitled
Abstract: No abstract text available
Text: Revision 16 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)
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TM1019
MIL-STD-883B
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ATF280F
Abstract: ATF280F-DK352 ATF280F-YF-E ATF280F-2J-E 32X4 IO937 ATF280F-DK U1 V1 and W1 is delta connections ATF280F-YF-MQ 115kBits
Text: ATF280F Features • SRAM based FPGA designed for Space use • • • • • • • • • • • • • • • – 280K equivalent ASIC gates – 14 400 Cells two 3-input LUT or one 4-input LUT, one DFF – Unlimited reprogrammability – SEE hardened (Configuration RAM, FreeRAMTM, DFF, JTAG, I/O buffers)
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ATF280F
7750D
ATF280F-DK352
ATF280F-YF-E
ATF280F-2J-E
32X4
IO937
ATF280F-DK
U1 V1 and W1 is delta connections
ATF280F-YF-MQ
115kBits
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stm32l pwm dc motor
Abstract: STM8L151 STM32L STM8L162R8 STM8L162M8 4x44-segment lcd 5421 pm0044 STM32L15xxx PH 68 52-06
Text: STM8L162R8 STM8L162M8 8-bit ultralow power MCU, 64 KB Flash, 2 KB data EEPROM RTC, AES, LCD, timers, USARTs, I2C, SPIs, ADC, DAC, COMPs Preliminary data Features • ■ ■ ■ Operating conditions – Operating power supply: 1.65 to 3.6 V without BOR , 1.8 to 3.6 V (with BOR)
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STM8L162R8
STM8L162M8
stm32l pwm dc motor
STM8L151
STM32L
STM8L162R8
STM8L162M8
4x44-segment
lcd 5421
pm0044
STM32L15xxx
PH 68 52-06
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RTAX2000
Abstract: RTAX2000S RTAX1000SL rtax250 RTAX250SL RTAX4000SL RTAX1000 RTAX-S RTAX1000S-SL rtax250s
Text: Rev ision 13 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)
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TM1019
MIL-STD-883B
Extended600
RTAX2000
RTAX2000S
RTAX1000SL
rtax250
RTAX250SL
RTAX4000SL
RTAX1000
RTAX-S
RTAX1000S-SL
rtax250s
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56 pin edac connector
Abstract: PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical
Text: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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TM1019
56 pin edac connector
PCB footprint cqfp 132
Silicon Sculptor II
ACTEL CCGA 624 mechanical
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