IMSB401
Abstract: inmos T414 Inmos T222
Text: 0 O W IO S Chapter 48 Dual-In-Line Transputer Modules TRAMs (INMOS Technical Note 29) 389 Dual-ln-Line Transputer Modules (TRAMs) 48.1 391 Background In the early days of the transputer, INMOS built a number of transputer evaluation boards. Most are the same
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220mm
IMSB401
inmos T414
Inmos T222
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D4405
Abstract: T414 9515s D7405 M212 ST20450 T222 T225 T400 T425
Text: TRANSPUTER occam 2.1 TOOLSET Transputer occam software development and debugging tools PRODUCT INFORMATION FEATURES occam 2.1 compiler. Excellent compile time diagnostics. Some global and local optimizations. Assembler inserts. Support for EPROM programming.
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D4414
Abstract: M212 ST20450 T222 T225 T400 T414 T425 enhanced ST20 manual Dx414
Text: TRANSPUTER ANSI C TOOLSET Transputer software development and debugging tools PRODUCT INFORMATION FEATURES ANSI C compiler X3.159-1989 . Excellent compile time diagnostics. Global and local optimization. Assembler inserts and stand alone assembler. Support for EPROM programming.
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Inmos t805
Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
Text: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support
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32-bit
Inmos t805
IMS T805-G25S
IMS T805-F25S
IMS T800
T400
T414
T425
T800
T805
inmos T414
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IMS T414
Abstract: inmos T414 IMST414 Transputer T414 ST425
Text: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ Pin compatible with IM ST800, IM ST425, IM ST400 and IMS T414 Debugging support ■
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32-bit
ST800,
ST425,
ST400
IMS T414
inmos T414
IMST414
Transputer T414
ST425
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AD T805
Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
Text: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support
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32-bit
AD T805
B50R
MEMAD11
T805
IMS T805-F25S
IMST805
transputer
Inmos t805
inmos transputer T225
inmos transputer T425
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T425
Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
Text: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal
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32-bit
T425
T400
T414
T800
T805
inmos transputer T425
T800 transputer
IMST425
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inmos T414
Abstract: Transputer T414 inmos transputer reference manual T414 inmos transputer link adapter Inmos t4142 Inmos transputer imst414 IMS T414
Text: mos Reference manual transputer i mos INMOS Limited PO Box 424 Bristol BS99 7DD England Telephone 0272 290861 Telex 444723 INMOS Corporation PO Box 16000 Colorado Springs CO 80935 USA Telephone (303) 630 4000 TWX 910 920 4904 INMOS GmbH Danziger Strasse 2
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TRN006
inmos T414
Transputer T414
inmos transputer reference manual
T414
inmos transputer link adapter
Inmos
t4142
Inmos transputer
imst414
IMS T414
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inmos T414
Abstract: IMS T414 T414 inmos transputer T425 IMSB401 T800 transputer inmos transputer IMSB008 T800 IMST414
Text: Chapter 17 149 IMS B401 TRAM 32-bit transputer 32 Kbytes Size 1 □ m os Engineering Data Reset Analyse-NotError ^ o /j- IMS T800 LinkO -«- h * or Linkl - - H , IMS T425 32 Kbytes SRAM Link2 Link3. Terminated links FEATURES GENERAL DESCRIPTION
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32-bit
chip800-25
T800-20
T425-25
T800-25
B401-3
B401-8
B401-5
inmos T414
IMS T414
T414
inmos transputer T425
IMSB401
T800 transputer
inmos transputer
IMSB008
T800
IMST414
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inmos T414
Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
Text: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM
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inmos T414
inmos T400
12u-1919-g19
25f5
T400 600
inmos transputer T425
T400 clock
T800 transputer
AD T805
IMS T414
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T400 600
Abstract: IMS T414
Text: Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 ■ 2 Kbytes on-chip static RAM
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32-bit
T400 600
IMS T414
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CQ 2AF1
Abstract: IMST425 IMS T400 Inmos T222
Text: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal
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32-bit
CQ 2AF1
IMST425
IMS T400
Inmos T222
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IMS T414
Abstract: inmos transputer T425 inmos T414 IMST425 T414 inmos transputer reference manual IMS T800 MARK RF01 T425 T800
Text: / / ,' ï ! I NMOS CORP IDE D I 4 ö 0 2 töfl OOOaSTl 3 I IM S T 425 transputer nnm os Advance Data FEATURES 30 MIPS peak 15 MIPS sustained performance 32 bit architecture IMS T800 & IMS T414-20 hardware/pin compatible 4 Kbytes on chip RAM for 120 Mbytes/sec data rate
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T414-20
T425-G17S
T425-G20S
T425-G25S
T425-G30S
T425-J17S
T425-J20S
T425-G17M
T425-G20M
IMS T414
inmos transputer T425
inmos T414
IMST425
T414
inmos transputer reference manual
IMS T800
MARK RF01
T425
T800
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IMST414
Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
Text: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425
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32-bit
IMST414
PLCC100/
IMS T400
ST T4 1060 0922
imst400
IMST225
inmos T414
T805-20
R3174
si9590
inmos transputer
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t425
Abstract: SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425
Text: w # S G S -T H O M S O N IM < 5 , kT # D ïiin g M iiiL iK g T Â E g n e i ,M & _ T 4 2 5 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMST400 and IMS T414
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32-bit
MST400
PGA/84pin
PLCC/100
t425
SGS thomson power schottky
8000000C
sgs thomson
23-F1
KJH T6
IMST425
inmos transputer T425
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sbl 20100
Abstract: T425-X25S MEMAD11 inmos transputer T425
Text: ^•7 # DMD g(fii ilL[l(gTO©[i!!in(gI / = T S G S -T H O M S O N IM S T 4 2 5 32-bit transputer FEATURES ■ 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414
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32-bit
sbl 20100
T425-X25S
MEMAD11
inmos transputer T425
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Untitled
Abstract: No abstract text available
Text: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425
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32-bit
T00b2
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inmos T400
Abstract: T400-T20S AD1230 T4-0065 800-00030 T400-J20S AD123 inmos transputer reference manual imst400
Text: iZ J S G S -T H O M S O N ^ 7 # . » » I U I © « » IM S T 4 0 0 ® 32 bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425
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inmos T414
Abstract: IMS T414 Transputer T414 IMST414 T414 inmos transputer reference manual transputer 7FFFFF84 22FC
Text: INMOS CORP 10E D | 4aG2b0fl 00G33S0 3 1 Ö nm oS C h a p te r 4 T - ^ ? -/7 -5 7 9 IMS T414 engineering data 107 Powered by ICminer.com Electronic-Library Service CopyRight 2003 IN M O S CORP "T-Vf-/7 * £ 7 40 02 1, 68 0 0 0 3 3 5 1 I I s I
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00D33S1
Link123Special
inmos T414
IMS T414
Transputer T414
IMST414
T414
inmos transputer reference manual
transputer
7FFFFF84
22FC
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T800 transputer
Abstract: QIC-24
Text: Chapter 5 □ cmmos 43 IMS D7216 IMS D6216 IMS D5216 IMS D4216 ANSI FORTRAN 77 Toolset Advance Information ANSI FORTRAN 77 cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI FORTRAN 77 ANSI X3.9 -1978 •
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D7216
D6216
D5216
D4216
FSVC78
DC600A
QIC-11,
QIC-24,
T800 transputer
QIC-24
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inmos m212 disk processor
Abstract: T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801
Text: Chapter 3 □ I mos* 23 IMS D7214 IMS D6214 IMS D5214 IMS D4214 ANSI C Toolset Product Information ANSI C cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI C compiler X3.159-1989 • Validated against Plum Hall validation suite
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D4214
DC600A
QIC-11,
QIC-24,
inmos m212 disk processor
T222
inmos T414
D5214
IMSB404
inmos transputer reference manual
ims-m212
Transputer T414
nec pc9801
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IMST800
Abstract: IMS T800 T800 transputer inmos transputer inmos T414 T800 IMS T414 inmos transputer reference manual Transputer T414 T800 equivalent
Text: INMOS CORP IDE D | MfiOBbaa QDQ32fia 5 I DffimoS Chapter 3 T - 4 1 - 1 7 -5 7 • IMS T800 engineering data 45 iNnos T - * ¿ 4 - /? - & corp / ioE d | M a o 2 t,aa □ o o 3 5 a ci m | 46 1 Introduction vcc GND C a p P lu s C a p M in u s R eset A n a ly s e
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EventAc70
000000001A
IMST800
IMS T800
T800 transputer
inmos transputer
inmos T414
T800
IMS T414
inmos transputer reference manual
Transputer T414
T800 equivalent
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