10H350
Abstract: DL122 MC10H350
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA PECL* to TTL Translator MC10H350 +5 Vdc Power Supply Only The MC10H350 is a member of Motorola’s 10H family of high performance ECL logic. It consists of 4 translators with differential inputs and TTL outputs. The 3–state outputs can be disabled by applying a HIGH TTL logic level on the
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10H350
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA PECL* to TTL Translator MC10H350 +5 Vdc Power Supply Only The MC10H350 is a member of Motorola’s 10H family of high performance ECL logic. It consists of 4 translators with differential inputs and TTL outputs. The 3–state outputs can be disabled by applying a HIGH TTL logic level on the
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MC10124 application
Abstract: MC10116 mecl data DL122 MC10115 MC10124
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad TTL to MECL Translator MC10124 The MC10124 is a quad translator for interfacing data and control signals between a saturated logic section and the MECL section of digital systems. The MC10124 has TTL compatible inputs, and MECL complementary open–emitter
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MC10125
Abstract: DL122 mecl logic
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad MECL to TTL Translator MC10125 The MC10125 is a quad translator for interfacing data and control signals between the MECL section and saturated logic sections of digital systems. The MC10125 incorporates differential inputs and Schottky TTL “totem pole”
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IC TTL 74LS00
Abstract: TTL LS 7400 IC TTL 74 ls 04 7400 fan-out cmos 7400 fan-out TTL 7400 catalog TTL 74ls00 TTL 7400 rise and fall time of ic 74ls00 74LS00 gate
Text: Design Considerations, Testing and Applications Assistance Form FAST AND LS TTL FAST AND LS TTL DATA 3-1 3 DESIGN CONSIDERATIONS SELECTING TTL LOGIC. TTL Families may be mixed in a system for optimum performance. For instance, in new designs, ALS would commonly be used in non-critical speed paths to minimize power consumption while FAST TTL would be used in high
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MC10129
Abstract: MC10129FN MC10129L MC10129P T714
Text: MC10129 Quad Bus Receiver The MC10129 data inputs are compatible with, and accept TTL logic levels as well as levels compatible with IBM–type buses. The clock, strobe, and reset inputs accept MECL 10,000 logic levels. The data inputs accept the bus levels, and storage elements are
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MC10H124
Abstract: DL122 MC10H115 MC10H116
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad TTL-to-MECL Translator With TTL Strobe Input MC10H124 The MC10H124 is a quad translator for interfacing data and control signals between a saturated logic section and the MECL section of digital systems. The 10H part is a functional/pinout duplication of the standard
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MC10H116
Abstract: mc10h124
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad TTL-to-MECL Translator With TTL Strobe Input MC10H124 The MC10H124 is a quad translator for interfacing data and control signals between a saturated logic section and the MECL section of digital systems. The 10H part is a functional/pinout duplication of the standard
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ALS TTL family characteristics
Abstract: ALS08 ALS00 ALS09 ALS03 ALS04 SN54ALS903 SN74ALS903 LS TTL family characteristics 2KOHMS
Text: Attachment B-17 ADVANCED LOW-POWER SCHOTTKY TTL J PRELIMINARY DATA SHEET TYPES SN54ALS903 and SN74ALS903 QUAD 2 - INPUT NAND BUFFERS with OPEN COLLECTOR OUTPUTS ELECTRICAL PINOUT QUAD 2- INPUT NAND BUFFERS w/O.C. OUTPUTS positive logic: ADVANCED OX IDE-ISOLATED, IONIMPLANTED SCHOTTKY TTL PROCESS
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10H124
Abstract: MC10H115 MC10H116 MC10H124 MC10H124FN MC10H124L MC10H124P
Text: MC10H124 Quad TTL-to-MECL Translator With TTL Strobe Input The MC10H124 is a quad translator for interfacing data and control signals between a saturated logic section and the MECL section of digital systems. The 10H part is a functional/pinout duplication of the
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10H351
Abstract: MC10H350 MC10H351 MC10H351FN MC10H351L MC10H351P
Text: MC10H351 Quad TTL/NMOS to PECL* Translator The MC10H351 is a quad translator for interfacing data between a saturated logic section and the PECL section of digital systems when only a +5.0 Vdc power supply is available. The MC10H351 has TTL/NMOS compatible inputs and PECL complementary
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MC10124 application
Abstract: MC10124 MC10124FN MC10124L MC10124P MC10124 QUAD TTL TO MECL TRANSLATOR MC10115 MC10116
Text: MC10124 Quad TTL to MECL Translator The MC10124 is a quad translator for interfacing data and control signals between a saturated logic section and the MECL section of digital systems. The MC10124 has TTL compatible inputs, and MECL complementary open–emitter outputs that allow use as an
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MC10124 QUAD TTL TO MECL TRANSLATOR
MC10115
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MC10125
Abstract: MC10125FN MC10125L MC10125P
Text: MC10125 Quad MECL to TTL Translator The MC10125 is a quad translator for interfacing data and control signals between the MECL section and saturated logic sections of digital systems. The MC10125 incorporates differential inputs and Schottky TTL “totem pole” outputs. Differential inputs allow for use
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MC10125
Abstract: MC10125P MC10125L MC10125FN MC10125 application
Text: MC10125 Quad MECL to TTL Translator The MC10125 is a quad translator for interfacing data and control signals between the MECL section and saturated logic sections of digital systems. The MC10125 incorporates differential inputs and Schottky TTL “totem pole” outputs. Differential inputs allow for use
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10H351
Abstract: CDIP-20
Text: MC10H351 Quad TTL/NMOS to PECL* Translator The MC10H351 is a quad translator for interfacing data between a saturated logic section and the PECL section of digital systems when only a +5.0 Vdc power supply is available. The MC10H351 has TTL/NMOS compatible inputs and PECL complementary
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DS9616HMJ
Abstract: DS9616H DS9627MJ E20A J14A
Text: General Description The DS9616H is a triple line driver which meets the electrical interface specifications of EIA RS-232-C and CCITT V.24 and/or MIL-STD-188C. Each driver converts TTL/DTL logic levels to EIA/CCIT and/or MIL-STD-188C logic levels for transmission between data terminal equipment and data
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wf vqc 10 d a6
Abstract: FB2031 SN54FB2031 SN74FB2031 734ns BG 723
Text: SN54FB2031, SN74FB2031 9-BIT TTL/BTL ADDRESS/DATA TRANSCEIVERS SCBS176B-NOVEMBER 19S1 -R E V IS E D JULY 1994 Compatible With IEEE 1194.1-1991 BTL and IEEE 896.2-1991 (Futurebus+) Standards TTL A Port, Backplane Transceiver Logic B Port Open-Collector B-Port Outputs Sink 100 mA
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wf vqc 10 d a6
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Untitled
Abstract: No abstract text available
Text: MC10H351 Quad TTL/NMOS to PECL* Translator Description The MC10H351 is a quad translator for interfacing data between a saturated logic section and the PECL section of digital systems when only a +5.0 Vdc power supply is available. The MC10H351 has TTL/NMOS compatible inputs and PECL complementary
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10H351
Abstract: MC10H351MG MC10H350 MC10H351 MC10H351FN MC10H352L MC10H352P
Text: MC10H351 Quad TTL/NMOS to PECL* Translator Description The MC10H351 is a quad translator for interfacing data between a saturated logic section and the PECL section of digital systems when only a +5.0 Vdc power supply is available. The MC10H351 has TTL/NMOS compatible inputs and PECL complementary
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10H351
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IC 74xx00
Abstract: 74XX00 TTL 74XX00 ACQ244 ACQ374 AN-680 actq244
Text: INTRODUCTION Most users of digital logic are quite familiar with the threshold specifications found on family logic data sheets. Designers using products with TTL level input thresholds will see numbers like VIH = 2.0V and VIL = 0.8V. These threshold guarantees are static, a part’s response to these levels during
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DL122
Abstract: MC10H350 MC10H351 IN714
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad TTL/NMOS to PECL* Translator MC10H351 L SUFFIX CERAMIC PACKAGE CASE 732–03 The MC10H351 is a quad translator for interfacing data between a saturated logic section and the PECL section of digital systems when only
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad TTL/NMOS to PECL* Translator MC10H351 L SUFFIX CERAMIC PACKAGE CASE 732–03 The MC10H351 is a quad translator for interfacing data between a saturated logic section and the PECL section of digital systems when only
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Untitled
Abstract: No abstract text available
Text: SN74FB2031 9-BIT TTL/BTL ADDRESS/DATA TRANSCEIVER SCBS176N – NOVEMBER 1991 – REVISED JUNE 2001 D D D D D Compatible With IEEE Std 1194.1-1991 BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink 100 mA High-Impedance State During Power Up
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FB2031
Abstract: SN74FB2031 SN74FB2031RC
Text: SN74FB2031 9-BIT TTL/BTL ADDRESS/DATA TRANSCEIVER SCBS176N – NOVEMBER 1991 – REVISED JUNE 2001 D D D D D Compatible With IEEE Std 1194.1-1991 BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink 100 mA High-Impedance State During Power Up
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