IDT77V1264L200
Abstract: No abstract text available
Text: IDT77V1264L200 Quad Port PHY Physical Layer for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications Description Features List Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for
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IDT77V1264L200
af-phy-040
77V1254L25
77V1264L200
IDT77V1264L200
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PTI 30 040 pa
Abstract: t04 68 3 pin diode sg ag20 LP1 K06 1LPN3 AC03 nec ae02 marking HT15 22 marking ag01 TWN AA 427
Text: User’s Manual µPD98412 NEASCOT-X15 Advanced ATM Switch LSI Document No. S14169EJ2V0UMJ1 (2nd edition) Date Published October 2000 N CP(K) Printed in Japan 1999 [MEMO] 2 User’s Manual S14169EJ2V0UM00 NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
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PD98412
NEASCOT-X15TM)
S14169EJ2V0UMJ1
S14169EJ2V0UM00
electri88-6130
PTI 30 040 pa
t04 68 3 pin diode
sg ag20
LP1 K06
1LPN3
AC03 nec
ae02 marking
HT15 22
marking ag01
TWN AA 427
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SA1381
Abstract: SS823 RDATA13 3RA61 AC21T n25h VSS1490 bwd9 HAD44 HAD48
Text: A B C D REVISIONS ZONE LTR CN8237/CX29704 PCB:BT01-D255-011 A DESCRIPTION INITIAL APPROVED DATE RELEASE 1 1 DL1 DELAYLINE 2.5NS 1 2 U7 3 CN8237 SEGMENTATION SCLK0 R124 18 DL2 B3SCLK0 A3SCLK1 R116 18 DELAYLINE 2.5NS POWER VDD PINS E7, E8, E11, E12, E15, E16
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CN8237/CX29704
BT01-D255-011
CN8237
BT01-X250
SA1381
SS823
RDATA13
3RA61
AC21T
n25h
VSS1490
bwd9
HAD44
HAD48
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ht12 decoder
Abstract: 417-183 epd driver ic nec CB-11
Text: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid
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d88-6130
ht12 decoder
417-183
epd driver ic
nec CB-11
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93CS56L
Abstract: con20a 34.368Mhz oscillator TXDATA15 13k g4 TXDATA13 LA10 LA12 GPIO03 LA-1105
Text: 1 2 3 C15 0.1uF AD1 AD5 AD3 AD8 AD7 AD12 AD10 -CBE1 AD14 -SERR -LOCK -PERR CON1 1 CON1 J5 1 CON1 J4 1 CON1 J3 1 J2 -DEVSEL -IRDY AD17 -CBE2 AD21 AD19 -CBE3 AD23 AD27 AD25 AD31 AD29 CLK A C16 0.1uF C17 0.1uF C12 0.1uF VIO VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3
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93CS56L
TxData10
TxData11
TxData12
TxData13
TxData14
TxData15
RxData10
RxData11
RxData12
93CS56L
con20a
34.368Mhz oscillator
TXDATA15
13k g4
TXDATA13
LA10
LA12
GPIO03
LA-1105
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ATM25
Abstract: IDT77V1264L200 ST6200T
Text: IDT77V1264L200 Quad Port PHY Physical Layer for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications Description Features List Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for
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IDT77V1264L200
af-phy-040
77V1254L25
144-Pin
PU-144)
77V1264L200
77V1254
25Mb/s
ATM25
IDT77V1264L200
ST6200T
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RX 433
Abstract: No abstract text available
Text: IDT77V1254L25 Quad Port PHY Physical Layer for 25.6 and 51.2 ATM Networks Features List ! ! ! ! ! ! ! ! ! ! ! ! Description Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for four 25.6 Mbps ATM channels
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IDT77V1254L25
IDT77V1254L25
77V1254L25-to-ATM
16-bit
RX 433
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I960CA
Abstract: CN8236 CX28250EVM Bt8223
Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.
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CN8236
CN8236
28236-DSH-001-B
I960CA
CX28250EVM
Bt8223
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ic 313
Abstract: S3043 S3044
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98414 2.4 Gbps ATM SONET FRAMER The µPD98414 NEASCOT-P70 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a transmission function for mapping an ATM cell passed from a high-end ATM layer
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PD98414
NEASCOT-P70)
STS-48c/SDH
STM-16c
ic 313
S3043
S3044
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CBD10
Abstract: intel 7882 MARKING 09F PHAST-12E TXC-05802B TXC-05810 TXC-06212 SA 6356
Text: CUBIT-622 Device Multi-PHY CellBus Access Device TXC-05805 DESCRIPTION • 622 Mbit/s performance • UTOPIA Level 1/2 interface 8/16-bit with support for 64 ports • Tandem operation for two devices, supporting dual CellBus cell switching in load sharing or
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CUBIT-622
TXC-05805
8/16-bit)
TXC-05805-MB
CBD10
intel 7882
MARKING 09F
PHAST-12E
TXC-05802B
TXC-05810
TXC-06212
SA 6356
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HTD12
Abstract: 45x45 bga CBD62 cba8 373 ic HTD24 application of microprocessor in aircrafts 6-pin plastic A6 tray 45x45 CBD43
Text: DATA SHEET MOS INTEGRATED CIRCUIT PD98410 1.2G ATM SWITCH LSI DESCRIPTION The PD98410 NEASCOT-X10TM is an LSI integrating ATM switch functions on a single chip. It has four UTOPIA level2 interfaces and can switch 24 24 circuits by using a multi-PHY connection. This LSI also realizes a switching
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PD98410
NEASCOT-X10TM)
bits/40
16Kial:
HTD12
45x45 bga
CBD62
cba8
373 ic
HTD24
application of microprocessor in aircrafts
6-pin plastic A6
tray 45x45
CBD43
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t04 68 3 pin transistor
Abstract: MD 202 flame relay AC03 nec alps lcd 14 pin t04 68 3 pin diode transistor z5t S3043 S3044 STM-16 z046
Text: User’s Manual µPD98414 NEASCOT-P70TM ATM 2.4Gbps SONET Framer Document No. S14166EJ4V0UM00 (4th edition) Date Published December 2001 J CP(K) 1999 1991 Printed in Japan [MEMO] 2 User's Manual S14166EJ4V0UM SUMMARY OF CONTENTS CHAPTER 1 GENERAL .13
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PD98414
NEASCOT-P70TM)
S14166EJ4V0UM00
S14166EJ4V0UM
t04 68 3 pin transistor
MD 202 flame relay
AC03 nec
alps lcd 14 pin
t04 68 3 pin diode
transistor z5t
S3043
S3044
STM-16
z046
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8032 Intel Microprocessor data Sheet
Abstract: atm header error checking ATM machine using microcontroller dmo 265 NAIS 210 T7296 3-bit comparator circuit receives two 3-bit 8052 microcontroller Intel LOG RX 2 1018 IC ordinary calculator programming
Text: áç XRT7245 PRELIMINARY DS3 UNI FOR ATM DECEMBER 1999 REV. 1.03 GENERAL DESCRIPTION • Contains on-chip 16 cell FIFO configurable in The XRT7245 DS3 ATM User Network Interface (UNI device is designed to provide the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers) interface for the public
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XRT7245
XRT7245
CellOf52Bytes)
8032 Intel Microprocessor data Sheet
atm header error checking
ATM machine using microcontroller
dmo 265
NAIS 210
T7296
3-bit comparator circuit receives two 3-bit
8052 microcontroller Intel
LOG RX 2 1018 IC
ordinary calculator programming
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DSLAM configuration AWS
Abstract: rx bc nbk TSC 13003 pcr 465 ATML 18751 circuit BKC International mpc82 bsdl nd1 marking code acm 33221
Text: MC92520 ATM Cell Processor User’s Manual MC92520UM/D Rev. 0, 12/2000 DigitalDNA and Mfax are trademarks of Motorola, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola microprocessors. There are no express or implied copyright licenses granted hereunder to design or fabricate Motorola integrated circuits or integrated
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MC92520
MC92520UM/D
DSLAM configuration AWS
rx bc nbk
TSC 13003
pcr 465
ATML
18751 circuit
BKC International
mpc82 bsdl
nd1 marking code
acm 33221
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Untitled
Abstract: No abstract text available
Text: CUBIT-3 Device CellBus Bus Switch TXC-05804 DATA SHEET DESCRIPTION FEATURES CUBIT®-Pro The CUBIT-3 is a single-chip VLSI solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus® architecture. Such systems are constructed from a number of CUBIT-3 devices, all
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TXC-05804
TXC-05802B)
TXC-05810)
8/16-bit)
TXC-05804-MB
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A01H
Abstract: 9FF MARKING T-RA18 SA 6356
Text: CUBIT-622 Device Multi-PHY CellBus Access Device TXC-05805 DESCRIPTION • 622 Mbit/s performance • UTOPIA Level 1/2 interface 8/16-bit with support for 64 ports • Tandem operation for two devices, supporting dual CellBus cell switching in load sharing or
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TXC-05805
8/16-bit)
TXC-05805-MB
A01H
9FF MARKING
T-RA18
SA 6356
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Untitled
Abstract: No abstract text available
Text: CUBIT-622 Device DATA SHEET PRODUCT PREVIEW DESCRIPTION FEATURES The CUBIT-622 device is a single-chip solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus architecture. Such systems are built from a number of CUBIT-3,
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TXC-05805
8/16-bit)
TXC-05805-MB
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HTA06
Abstract: hta08 CBA07 HTD12 HTA12 ic 351 HTA09 CBD16 12-PHY HTA01
Text: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社
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PD98412
NEASCOT-X15TM
PD98412
S14169J
HTA06
hta08
CBA07
HTD12
HTA12
ic 351
HTA09
CBD16
12-PHY
HTA01
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Untitled
Abstract: No abstract text available
Text: XRT7300 E3/DS3/STS-1 Line Interface Unit September 1999-2 FEATURES l Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51.84Mbps) Applications l l Transmit Interface Characteristics l Accepts Either Single Rail or Dual Rail Data
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XRT7300
368Mbps)
736Mbps)
84Mbps)
GR-499-CORE
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Untitled
Abstract: No abstract text available
Text: áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT SEPTEMBER 2000 REV. 1.0.7 FEATURES • Meets E3/DS3/STS-1 Jitter Tolerance Requirements GENERAL DESCRIPTION The XRT7300 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.
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XRT7300
XRT7300
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NEC AC08
Abstract: S3043 S3044
Text: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98414 2.4 Gbps ATM SONET FRAMER The µPD98414 NEASCOT-P70 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a transmission function for mapping an ATM cell passed from a high-end ATM layer
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Original
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PD98414
NEASCOT-P70ï
STS-48c/SDH
STM-16c
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TXC-05804-MB
Abstract: sot marking code w17 W17 marking code sot 23
Text: CUBIT-3 Device CellBus Bus Switch TXC-05804 DATA SHEET CUBIT®-Pro The CUBIT-3™ is a single-chip VLSI solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus® architecture. Such systems are constructed from a number of CellBus devices, all
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TXC-05804
TXC-05802B)
CUBIT-622
TXC-05805)
TXC-05810)
8/16-bit)
TXC-05804-MB
sot marking code w17
W17 marking code sot 23
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g30 nec 222
Abstract: AK03 CBD46 HTA09 AG09 CBD21
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98412 1.5G ATM SWITCH LSI DESCRIPTION The µPD98412 NEASCOT-X15 is an LSI integrating ATM switch functions on a single chip. It has UTOPIA Level2 interfaces and can switch 30 x 30 circuits by connecting multiple PHY devices. This LSI employs a shared
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PD98412
NEASCOT-X15)
PD98412
S14169E
g30 nec 222
AK03
CBD46
HTA09
AG09
CBD21
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