ULTRA338007 Search Results

ULTRA338007 Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
Ultra338007		Cypress Semiconductor	UltraLogic Very High Speed 3.3V 7K Gate CMOS FPGA		Scan	PDF

ULTRA338007 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: 7c33807: October 9, 1995 Revision: October 25, 1995 Ultra338007 ADVANCED INFORMATION UltraLogict Very High Speed 3.3V 7K Gate CMOS FPGA D Robust routing resources Features D True 3.3V operation D Very high speed D D D D D D Ċ Loadable counter frequencies	Original	7c33807: Ultra338007 144pin 208pin 256pin po100 Ultra38000t Ultra38000 7C3380071 Ultra3800,	PDF
ALI chipset Ali 3516 Abstract: SEM 2006 6216 static ram sem 2005 ALI chipset Ali 3510 vl82c483 ali 3516 CMOS 5408 PAL Decoder 16L8 1K x 8 static ram Text: June 1996 Cypres Semiconductor Corporation NUMERIC DEVICE INDEX Document Number Device Number 5000 5000 3518 3518 3519 CY101E383 CY10E383 CY2071 CY2081 CY2250 3522 3509 CY2252 CY2254A 3510 CY2255 3517 CY2257 3520 CY2260 3511 3023 3024 3011 3013 3019 3006 3023	Original	CY101E383 CY10E383 CY2071 CY2081 CY2250 CY2252 CY2254A CY2255 CY2257 CY2260 ALI chipset Ali 3516 SEM 2006 6216 static ram sem 2005 ALI chipset Ali 3510 vl82c483 ali 3516 CMOS 5408 PAL Decoder 16L8 1K x 8 static ram	PDF
antifuse programming technology Abstract: No abstract text available Text: S£. CYPRESS Features • TVue 3 3 V operation • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz ADVANCED INFORMATION Ultra338007 UltraLogic Very High Speed 3.3V 7K Gate CMOS FPGA	OCR Scan	Ultra338007 144-pin 208-pin 256-pin 16-bit Ultra38000, antifuse programming technology	PDF
Untitled Abstract: No abstract text available Text: CYPRESS Features • True 3.3V operation • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating Frequencies up to 85 MHz — Input + logic cell + output delays under 7 ns • Unparalleled FPGA performance for counters, data path, state machines,	OCR Scan	144-pin 208-pin 256-pin 16-bit 00000000000000F J000000000 00000000000000A000000000 0000000000000A E000000000G 0000000000E	PDF