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    AMD XC95288XL-10TQG144C

    IC CPLD 288MC 10NS 144TQFP
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    DigiKey XC95288XL-10TQG144C Tray 2,266 1
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    AMD XC95288XL-7TQG144C

    IC CPLD 288MC 7.5NS 144TQFP
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    DigiKey XC95288XL-7TQG144C Tray 697 1
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    Newark XC95288XL-7TQG144C Bulk 1
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    AMD XC95288XL-6TQG144C

    IC CPLD 288MC 6NS 144TQFP
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    DigiKey XC95288XL-6TQG144C Tray 416 1
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    Newark XC95288XL-6TQG144C Bulk 1
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    AMD XC95288XL-10PQ208I

    IC CPLD 288MC 10NS 208QFP
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    DigiKey XC95288XL-10PQ208I Tray 226 1
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    AMD XC95288XL-10BG256I

    IC CPLD 288MC 10NS 256BGA
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    DigiKey XC95288XL-10BG256I Tray 112 1
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    XC952 Datasheets (360)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    XC95216 Xilinx In-System Programmable CPLD Family Original PDF
    XC95216 Xilinx The Programmable Logic Data Book Original PDF
    XC95216 Xilinx XC95216 In-System Programmable CPLD Original PDF
    XC95216-10BG352C Xilinx Embedded - CPLDs (Complex Programmable Logic Devices), Integrated Circuits (ICs), IC CPLD 216MC 10NS 352BGA Original PDF
    XC95216-10BG352C Xilinx In-System Programmable CPLD Original PDF
    XC95216-10BG352C Xilinx In-System Programmable CPLD Original PDF
    XC95216-10BG352C Xilinx Over 600 obsolete distributor catalogs now available on the Datasheet Archive - CPLDs XCR Series CPLDs - 3 V and 5 V Fast Zero Power CoolRunner Scan PDF
    XC95216-10BG352I Xilinx Embedded - CPLDs (Complex Programmable Logic Devices), Integrated Circuits (ICs), IC CPLD 216MC 10NS 352BGA Original PDF
    XC95216-10BG352I Xilinx In-System Programmable CPLD Original PDF
    XC95216-10BG352I Xilinx In-System Programmable CPLD Original PDF
    XC95216-10BGG352C Xilinx XC95216-10BGG352C - NEW PRODUCT Original PDF
    XC95216-10BGG352I Xilinx XC95216-10BGG352I - NEW PRODUCT Original PDF
    XC95216-10BQ352C Xilinx In-system programmable CPLD. Speed 10ns pin-to-pin delay. Original PDF
    XC95216-10BQ352I Xilinx In-system programmable CPLD. Speed 10ns pin-to-pin delay. Original PDF
    XC95216-10HQ208C Xilinx Embedded - CPLDs (Complex Programmable Logic Devices), Integrated Circuits (ICs), IC CPLD 216MC 10NS 208HQFP Original PDF
    XC95216-10HQ208C Xilinx In-System Programmable CPLD Original PDF
    XC95216-10HQ208C Xilinx In-System Programmable CPLD Original PDF
    XC95216-10HQ208C Xilinx Over 600 obsolete distributor catalogs now available on the Datasheet Archive - CMOS CPLD, 216 Macrocells, 12 Func Blks, 216 Regs, 10ns, Pkg Style 208 Lead QFP Scan PDF
    XC95216-10HQ208I Xilinx Embedded - CPLDs (Complex Programmable Logic Devices), Integrated Circuits (ICs), IC CPLD 216MC 10NS 208HQFP Original PDF
    XC95216-10HQ208I Xilinx In-System Programmable CPLD Original PDF
    ...

    XC952 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    471 E25

    Abstract: PQ160 XC9500 XC95216
    Text: XC95216 In-System Programmable CPLD  October 28, 1997 Version 2.0 3* Product Specification Features Power Management • • • • • Power dissipation can be reduced in the XC95216 by configuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize


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    PDF XC95216 36V18 PQ160 160-Pin HQ208 208-Pin BG352 471 E25 XC9500

    XC95288XL pinout

    Abstract: XC95288XL XC95288XL-7PQ208I XC95288XL-7TQ144I XC95288XL-10PQ208I XC95288XL-10TQ144I marking G18 XC95288XL-10-PQ208 XC95288XL-6FG256C XAPP114
    Text: XC95288XL High Performance CPLD DS055 v1.7 August 21, 2003 5 Features • • • • • • • • • • • 6 ns pin-to-pin logic delays System frequency up to 208 MHz 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins)


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    PDF XC95288XL DS055 144-pin 208-pin 256-pin 280-pin BG256 BG352) CS280 XC95288XL pinout XC95288XL-7PQ208I XC95288XL-7TQ144I XC95288XL-10PQ208I XC95288XL-10TQ144I marking G18 XC95288XL-10-PQ208 XC95288XL-6FG256C XAPP114

    XC95288XL10TQG144I pinout

    Abstract: XC95288XL PQG208 XC95288XL pinout XC95288XL-10TQG144C fgg256 XC95288XL XC95288XL-7CS280C XC95288XL-10FGG256I XC95288XL-7TQ144I pqg208
    Text: XC95288XL High Performance CPLD R DS055 v2.1 April 3, 2007 5 Features • • • • • • • • • • • 6 ns pin-to-pin logic delays System frequency up to 208 MHz 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins


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    PDF XC95288XL DS055 144-pin 208-pin 256-pin 280-pin 220oC. XC95288XL10TQG144I pinout XC95288XL PQG208 XC95288XL pinout XC95288XL-10TQG144C fgg256 XC95288XL-7CS280C XC95288XL-10FGG256I XC95288XL-7TQ144I pqg208

    471 E25

    Abstract: XC95216 Family 134-174 PQ160 XC9500 XC95216
    Text: 1 XC95216 In-System Programmable CPLD  August 21, 2001 Version 3.1 1 0* Product Specification Features Power Management • • 10 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 216 macrocells with 4800 usable gates Up to 166 user I/O pins


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    PDF XC95216 36V18 PQ160 160-Pin HQ208 208-Pin BG352 352-Pin XC95216 PQ160 471 E25 XC95216 Family 134-174 XC9500

    XC95216-20PQG160I

    Abstract: XC95216-15PQ160I 471 E25 XC95216 Family XC95216-10PQ160C XC95216-10PQ160I XC95216-15PQG160C XC95216-15PQG160I XC95216-10PQG160I XC9500
    Text: XC95216 In-System Programmable CPLD R 5 Note: The 352-pin BGA packages are being discontinued for XC95216 devices. You cannot order these packages after May 14, 2008. Xilinx recommends replacing XC95216 in 352-pin BGA packages with XC95288 devices in 352-pin BGA packages in all designs as soon as possible. Recommended replacements are pin compatible, but


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    PDF XC95216 352-pin XC95288 XCN07010 352-pin XC95216-20PQG160I XC95216-15PQ160I 471 E25 XC95216 Family XC95216-10PQ160C XC95216-10PQ160I XC95216-15PQG160C XC95216-15PQG160I XC95216-10PQG160I XC9500

    TQ144

    Abstract: XAPP361 XC9500XV XC95288XV XC95288XV-10 XC95288XV-7
    Text: u XC95288XV High-Performance CPLD R DS050 v2.5 August 21, 2003 5 Features • • • • • • • • 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins) - 208-pin PQFP (168 user I/O pins) - 280-pin CSP (192 user I/O pins)


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    PDF XC95288XV DS050 144-pin 208-pin 280-pin 256-pin 54-input 220oC. TQ144 XAPP361 XC9500XV XC95288XV-10 XC95288XV-7

    XC95288

    Abstract: BG352 HQ208 XC9500 n439
    Text: XC95288 In-System Programmable CPLD R DS069 v4.1 August 21, 2003 5 Product Specification Features Description • • 15 ns pin-to-pin logic delays on all pins fCNT to 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 166 user I/O pins 5V in-system programmable


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    PDF XC95288 DS069 36V18 BG352 352-ball XC95288-20HQ208I HQ208 208-pin XC95288-20BG352I BG352 HQ208 XC9500 n439

    471 E25

    Abstract: xc95288 XC95288-15HQ208I AD9318 A23 780-4 BG352 HQ208 XC9500 h3144 n439
    Text: XC95288 In-System Programmable CPLD R DS069 v4.3 April 3, 2006 5 Product Specification Features Description • • 15 ns pin-to-pin logic delays on all pins fCNT to 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 166 user I/O pins 5V in-system programmable


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    PDF XC95288 DS069 36V18 471 E25 XC95288-15HQ208I AD9318 A23 780-4 BG352 HQ208 XC9500 h3144 n439

    Untitled

    Abstract: No abstract text available
    Text: Product Obsolete/Under Obsolescence u XC95288XV High-Performance CPLD R DS050 v3.0 June 25, 2007 5 Note: This product is being discontinued. You cannot order parts after May 14, 2008. Xilinx recommends replacing XC95288XV devices with equivalent XC95288XL


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    PDF XC95288XV DS050 XC95288XL XCN07010 220oC.

    XC95288

    Abstract: Marking af1 AF24 marking
    Text: XC95288 In-System Programmable CPLD R DS069 v4.2 April 15, 2005 5 Product Specification Features Description • • 15 ns pin-to-pin logic delays on all pins fCNT to 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 166 user I/O pins 5V in-system programmable


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    PDF XC95288 DS069 36V18 Marking af1 AF24 marking

    XC95288

    Abstract: HQ208
    Text:  XC95288 In-System Programmable CPLD June 1, 1996 Version 1.0 Advance Product Specification Features Description • • • • • The XC95288 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of sixteen


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    PDF XC95288 36V18 HQ208 HQ208

    PQ160

    Abstract: XC9500 XC95216
    Text: 1 XC95216 In-System Programmable CPLD  August 21, 2001 Version 3.1 1 0* Product Specification Features Power Management • • 10 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 216 macrocells with 4800 usable gates Up to 166 user I/O pins


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    PDF XC95216 36V18 PQ160 160-Pin HQ208 208-Pin BG352 352-Pin XC95216 PQ160 XC9500

    v19 423

    Abstract: V19 312 TQ144 XC9500XL XC95288 XC95288XL w17 88
    Text: 1 XC95288XL High Performance CPLD R June 7, 1999 Version 1.2 5* Preliminary Product Specification Features Power Estimation • • • • Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output


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    PDF XC95288XL XC9500XL -40oC XC95288XL TQ144 PQ208 BG256 CS280 v19 423 V19 312 TQ144 XC95288 w17 88

    xc95216-20pq160c

    Abstract: No abstract text available
    Text: Product Obsolete/Under Obsolescence XC95216 In-System Programmable CPLD R DS068 v5.0 May 17, 2013 5 Product Specification Features Description • • 10 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 216 macrocells with 4,800 usable gates


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    PDF XC95216 DS068 36V18 BG352 BGG252 XCN11010 352-pin XCN07010 xc95216-20pq160c

    XC95288-15HQ208I

    Abstract: XC95288
    Text: Product Obsolete/Under Obsolescence XC95288 In-System Programmable CPLD R DS069 v5.0 May 17, 2013 5 Product Specification Features Description • • 15 ns pin-to-pin logic delays on all pins fCNT to 95 MHz • • • 288 macrocells with 6,400 usable gates


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    PDF XC95288 DS069 36V18 XCN11010 XC95288-15HQ208I

    471 E25

    Abstract: XC95216-20PQ160I DS06 HQ208 PQ160 XC9500 XC95216 XC95216-10HQ208I XC95216-10PQ160 n439
    Text: XC95216 In-System Programmable CPLD R DS068 v4.1 August 21, 2003 5 Product Specification Features Description • • 10 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 216 macrocells with 4,800 usable gates Up to 166 user I/O pins 5V in-system programmable


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    PDF XC95216 DS068 36V18 PQ160 160-pin XC95216-20HQ208I HQ208 208-pin XC95216-20BG352I BG352 471 E25 XC95216-20PQ160I DS06 HQ208 PQ160 XC9500 XC95216-10HQ208I XC95216-10PQ160 n439

    A23 780-4

    Abstract: 471 E25 BG352 HQ208 XC9500 XC95288
    Text: XC95288 In-System Programmable CPLD  November 12, 1997 Version 2.0 3* Preliminary Product Specification Features MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f • • • • • Where: • • • • • • • • • • • MCHP = Macrocells in high-performance mode


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    PDF XC95288 arcAC25, HQ208 208-Pin BG352 352-Pin XC95288 A23 780-4 471 E25 XC9500

    Untitled

    Abstract: No abstract text available
    Text: flXIUNX XC95288XL High Performance CPLD September 28,1998 Version 1.0 Advance Product Specification Features Power Estimation • • • • Power dissipation in CPLDs can vary substantially depend­ ing on the system frequency, design application and output


    OCR Scan
    PDF XC95288XL 144-pin 208-pin 352-pin 54-input TQ144 PQ208 BG352

    XC95288

    Abstract: No abstract text available
    Text: flXIUNX XC95288 In-System Programmable CPLD December 4, 1998 Version 3.0 Product Specification Features Power Management • • 15 ns pin-to-pin logic delays on all pins fcN T 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 192 user I/O pins


    OCR Scan
    PDF XC95288 36V18 HQ208 208-Pin BG352 352-Pin

    XC95288

    Abstract: No abstract text available
    Text: flX IU N X XC95288 In-System Programmable CPLD June 1, 1996 Version 1.0 Advance Product Specification Features Description • • The XC95288 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of sixteen


    OCR Scan
    PDF XC95288 36V18 HQ208

    F25-F26

    Abstract: No abstract text available
    Text: flXILINX XC95288 In-System Programmable CPLD N o vem b er 12, 1997 V ersion 2.0 Preliminary Product Specification Features MCHp (1.7) + MC lp (0.9) + MC (0.006 mA/MHz) f • 15 ns pin-to-pin logic delays on all pins • fcNT 95 MHz • 288 macrocells with 6,400 usable gates


    OCR Scan
    PDF XC95288 36V18 HQ208 208-Pin BG352 352-Pin F25-F26

    Untitled

    Abstract: No abstract text available
    Text: flXIUNX XC95216 In-System Programmable CPLD December 4, 1998 Version 3.0 Product Specification Features Power Management • 10 ns pin-to-pin logic delays on all pins • fcN T to 111 MHz • • • 216 macrocells with 4800 usable gates Up to 166 user I/O pins


    OCR Scan
    PDF XC95216 36V18 PQ160 160-Pin HQ208 208-Pin BG352 352-Pin PQ160 HQ208

    Untitled

    Abstract: No abstract text available
    Text: KXIUNX XC95216 In-System Programmable CPLD J u n e 1, 1 9 9 6 V e rs io n 1.0 Prelim inary Product Specification Features Power Management • 10 ns pin-to-pin logic delays on all pins C N T to 111 MHz • • • 216 m acrocells with 4800 usable gates Up to 168 user I/O pins


    OCR Scan
    PDF XC95216 36V18 out208 PQ160 160-Pin HQ208 208-Pin

    XC95288

    Abstract: No abstract text available
    Text: flXIU N X XC95286 In-System Programmable CPLD October 28, 1997 Version 2.0 Preliminary Product Specification Features MC h p (1.7) + MC lp (0.9) + MC (0.006 m A/M Hz) f • 15 ns pin-to-pin logic delays on all pins Where: • • • • fcNT to MHz 288 macrocells with 6,400 usable gates


    OCR Scan
    PDF XC95286 36V18 boundary-scaE15, XC95288 HQ208 208-Pin BG352 352-Pin XC95288