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    ZYTREX 74AHCT Search Results

    ZYTREX 74AHCT Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74AHCT1G00DCKRG4 Texas Instruments Single 2-Input Positive-NAND Gate 5-SC70 -40 to 125 Visit Texas Instruments Buy
    74AHCT1G02DBVTG4 Texas Instruments Single 2-Input Positive-NOR Gate 5-SOT-23 -40 to 85 Visit Texas Instruments Buy
    74AHCT1G04DBVRG4 Texas Instruments Single Inverter Gate 5-SOT-23 -40 to 125 Visit Texas Instruments Buy
    74AHCT1G08DRLRG4 Texas Instruments Single 2-Input Positive-AND Gate 5-SOT-5X3 -40 to 125 Visit Texas Instruments Buy
    74AHCT1G14DCKTE4 Texas Instruments Single Schmitt-Trigger Inverter Gate 5-SC70 -40 to 125 Visit Texas Instruments Buy

    ZYTREX 74AHCT Datasheets Context Search

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    74AHCT

    Abstract: TTL Schmitt-Trigger cmos BC5-10
    Text: Zytrex ZX54AHCT ZX74AHCT February 1985 121 Monostable Multivibrators with Schmitt-Trigger inputs OBJECTIVE SPECIFICATIONS Features Description • Schmitt-trigger for slow input transitions ■ Internal timing resistor These multivibrators feature dual negative-transition-trig­


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    PDF ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT TTL Schmitt-Trigger cmos BC5-10

    bma 023

    Abstract: 74AHCT
    Text: Zytrex _ F ebruary 1965 OBJECTIVE SPECIFICATIONS Hex Inverter Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These devices contain six independent inverters. They perform the Boolean function Y = A.


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    PDF ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: bma 023 74AHCT

    A7c DIODE

    Abstract: 74AHCT 113B8 74als power consumption
    Text: Zytrex ZX54AHCT ZX74AHCT 640 ?* "cT643 Octal Bus Transceivers February 1985 OBJECTIVE SPECIFICATIONS . Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These high-speed octal bus transceivers are designed


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    PDF ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: A7c DIODE 74AHCT 113B8 74als power consumption

    74AHCT

    Abstract: No abstract text available
    Text: Zytrex ZXS4AHCT ZX74AHCT 259 8-Bit Addressable Latches February 1985 OBJECTIVE SPECIFICATIONS Features Description • 8-Bit parallel-out storage register performs serial-to-parallel conversion with storage The ’259 is a high-speed addressable latch designed for


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    PDF ZX74AHCT 54/74ALS 74AHCT

    Zytrex 74ahct

    Abstract: 74AHCT
    Text: Zytrex ZXS4AHCT ZX74AHCT 138 3-Line to 8-Line Decoders/Multiplexers February 1985 OBJECTIVE SPECIFICATIONS . Features Description • Designed specifically for high-speed memory decoders and data transmission systems These devices are designed to be used in high-perform­


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    PDF ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT Ta--40Â Ta--55Â Zytrex 74ahct

    74AHCT

    Abstract: No abstract text available
    Text: Zytrex ZXS4AHCT ZX74AHCT 12 Triple 3-Input NAND Gates with Open-Draln Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These devices contain three independent 3-input NAND


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    PDF ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT

    74AHCT

    Abstract: No abstract text available
    Text: Zytrex ZXS4AHCT ZX74AHCT 05 Hex Inverters with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pln-out, speed and drive compatibility with 54/74ALS logic family These devices contain six independent inverters with


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    PDF ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT

    74AHCT

    Abstract: 74als power consumption Zytrex
    Text: Zytrex _ Fe brua ry 1985 ZXS4AHCT ZX74AHCT # # S m^ Dual Retriggerable Monostable Multivibrator OBJECTIVE SPECIFICATIONS Features Description • Simple pulse width formula T = RC The '123 consists of two independent monostable multi­ vibrators that feature both a negative, A, and a positive,


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    PDF 54/74ALS 74AHCT: 54AHCT: ZX74AHCT 74AHCT 74als power consumption Zytrex

    8D-13

    Abstract: 74AHCT
    Text: Zytrex ZXS4AHCT ZX74AHCT 374 Octal D-Type Flip-Flops with 3-State Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description m Function, pin-out, speed and drive • Low power consumption characteristic of CMOS The ’374 consists of 8 high-speed D-type edge-triggered


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    PDF ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 8D-13 74AHCT

    74AHCT

    Abstract: No abstract text available
    Text: Zytrex ZXS4AHCT ZX74AHCT February 1985 « % Q u ad 2 -fn p u t O R GatèsL OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These devices contain four independent 2-input OR gates. They perform the Boolean functions Y = A + B


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    PDF ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT

    74AHCT

    Abstract: No abstract text available
    Text: Zytrex ZXS4AHCT ZX74AHCT Dual 2-to-4 Line Decoder/Multiplexers F e b ru a ry 1 9 8 5 O B J E C T IV E S P E C IF IC A T IO N S 155 . Features Description • Typical applications: Dual 2-to-4 line decoder Dual 1-to-4 line demultiplexer 3-to-8 line decoder


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    PDF ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: ahcti55 74AHCT 54AHCT

    74AHCT

    Abstract: Z648 ahct646
    Text: ZXS4AHCT ZX74AHCT F ebrua ry 1985 £ L Octal 3-State Bus Transceivers with Registers OBJECTIVE SPECIFICATIONS , 2XS4AHCT ZX74AHCT Features Description • 8 bi-directional data paths The '646 and ’648 are bi-directional bus transceivers with D-type flip-flops and control circuitry to facilitate high


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    PDF ZX74AHCT 24-pin 54/74ALS 74AHCT: 54AHCT: 74AHCT Z648 ahct646

    diode Rl 257

    Abstract: Zytrex 74ahct AHCT257 54AHCT Zytrex 74AHCT PF1016
    Text: Zvtrex ZXS4AHCT ZX74AHCT 257 ^ 258 Quad 2-Line to 1-Line Data Selector/ Multiplexers with 3-State Outputs February 1985 OBJECTIVE SPECIFICATIONS Description Features Function, pin-out, speed and drive compatibility with 54/74ALS logic family Low power consumption characteristic of


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    PDF ZX74AHCT 54/74ALS 74AHCT: 54AHCT: diode Rl 257 Zytrex 74ahct AHCT257 54AHCT Zytrex 74AHCT PF1016

    zytrex

    Abstract: 74AHCT
    Text: Sftmx ZX54AHCT ZX74AHCT February 1985 OBJECTIVE SPECIFICATIONS 157 sag158 Quad 2-Line to 1-Line Data Se/ector/Muitipiexers _ Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These are data selector/m ultiplexers which select a 4-bit


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    PDF ZX54AH ZX74AHCT 54/74ALS 74AHCT: 54AHCT: AHCTi57 AHCTi58 74AHCT 54AHCT Cl-50 zytrex

    74AHCT

    Abstract: 0C17G
    Text: Zvtrex ZXS4AHCT n§ ' #oS ZX74AHCT m t M m Dual J-K Negative-Edge-Triggered Flip-Flops with Preset and Clear February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family ■ Characterized for operation over Industrial


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    PDF ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT 0C17G

    74AHCT

    Abstract: No abstract text available
    Text: Z y tr e x ZX54AHCT ZX74AHCT 191 Synchronous 4-Bit Up/Down Binary Counters Februa ry 1985 OBJECTIVE SPECIFICATIONS tion eliminates the output counting spikes normally asso­ ciated with asynchronous ripple clock counters. Features • Single down/up count control line


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    PDF ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT