SH67P33CX
Abstract: No abstract text available
Text: SH67P33C OTP 1K 4-bit Micro-controller Features SH6610C-Based Single-Chip 4-bit Micro-Controller ROM: 1K X 16 bits RAM: 80 X 4 bits - 32 System Control Register - 48 Data memory Operation Voltage: 1.8V - 3.6V Typically 3.0V 16 CMOS Bi-directional I/O pins and 1 CMOS input pin
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SH67P33C
SH6610C-Based
400kHz
16/fOSC)
SH67P33CX
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SH66K33A
Abstract: No abstract text available
Text: SH66K33A MASK 1K 4-bit Micro-controller Features SH6610C-Based Single-Chip 4-bit Micro-Controller ROM: 1K X 16 bits RAM: 80 X 4 bits - 32 System Control Register - 48 Data memory Operation Voltage: 1.8V - 3.6V Typically 3.0V 16 CMOS Bi-directional I/O pins and 1 COMS input pin
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SH66K33A
SH6610C-Based
400kHz
SH67P33A)
16/fOSC)
SH66K33A
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PDF
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256K x 8 SRAM CY7C128A SRAM
Abstract: 5962-86705 PLD28 5962-89935 pld20ra10 5962-89598 CY7C132 cy7c291 PLD20RA PLDC20G10
Text: Military Product Selector Guide Static RAMs Size Organization Pins DIP SMD Number Part Number Speed (ns) ICC/ISB/ICCDR (mA @ ns) 883 Availability 1K 256 x 4 22 CY7C122 5962-88594 tAA = 25, 35 90 @ 25 Now 4K 1K x 4—Separate I/O 24S CY7C150 5962-88588 tAA = 25
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CY7C122
CY7C150
CY7C130/31
CY7C128A
CY6116A
MIL-PRF-38535.
MIL-STD-883D
22-pin
300-mil
256K x 8 SRAM CY7C128A SRAM
5962-86705
PLD28
5962-89935
pld20ra10
5962-89598
CY7C132
cy7c291
PLD20RA
PLDC20G10
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PDF
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Untitled
Abstract: No abstract text available
Text: SH67P33C OTP 1K 4-bit Micro-controller Features SH6610C-Based Single-Chip 4-bit Micro-Controller ROM: 1K X 16 bits RAM: 80 X 4 bits - 32 System Control Register - 48 Data memory Operation Voltage: 1.8V - 3.6V Typically 3.0V 16 CMOS Bi-directional I/O pins and 1 CMOS input pin
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Original
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SH67P33C
SH6610C-Based
400kHz
16/fOSC)
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Untitled
Abstract: No abstract text available
Text: SH67P847 OTP 1K 4-bit micro-controller with 10-bit SAR ADC Features SH6610C-Based Single-Chip 4-bit Micro-Controller With 10-bit SAR ADC OTP ROM: 1K X 16bits RAM: 124 X 4bits - 28 System Control Registers - 96 Data Memory Operation Voltage: - fOSC =16MHz, VDD = 3.3V - 5.5V
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SH67P847
10-bit
SH6610C-Based
16bits
16MHz,
16MHz
16/fOSC)
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PDF
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Untitled
Abstract: No abstract text available
Text: TM58P11 1. Feature ROM: 1k 1K x 14 bits RAM: 41 (41 x 8 bits) Internal multi-band RC oscillator with programmable calibration, the band ranges include 6M, 4M, 910K and 32K. STACK: 4 Levels Support On-chip programming circuit I/O ports: 9 I/O Pads and 1 input Pad
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TM58P11
910Khz,
32Khz
100pf
300pf
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PDF
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CY7C4801
Abstract: CY7C4811 CY7C4821 CY7C4831 CY7C4841 CY7C4851 IDT72801 QA08 IDT728X1
Text: 4831/4 CY7C4801/4811/4821 CY7C4831/4841/4851 256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs Features • Double high speed, low power, first-in first-out FIFO memories • Double 256 x 9 (CY7C4801) • Double 512 x 9 (CY7C4811) • Double 1K x 9 (CY7C4821)
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CY7C4801/4811/4821
CY7C4831/4841/4851
256/512/1K/2K/4K/8K
CY7C4801)
CY7C4811)
CY7C4821)
CY7C4831)
CY7C4841)
CY7C4851)
CY7C4201/4211/4221/
CY7C4801
CY7C4811
CY7C4821
CY7C4831
CY7C4841
CY7C4851
IDT72801
QA08
IDT728X1
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PDF
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CY7C4801
Abstract: CY7C4811 CY7C4821 CY7C4831 CY7C4841 CY7C4851
Text: CY7C4831/4 1 CY7C4801/4811/4821 CY7C4831/4841/4851 256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs Features • Double high speed, low power, first-in first-out FIFO memories • Double 256 x 9 (CY7C4801) • Double 512 x 9 (CY7C4811) • Double 1K x 9 (CY7C4821)
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CY7C4831/4
CY7C4801/4811/4821
CY7C4831/4841/4851
256/512/1K/2K/4K/8K
CY7C4801)
CY7C4811)
CY7C4821)
CY7C4831)
CY7C4841)
CY7C4851)
CY7C4801
CY7C4811
CY7C4821
CY7C4831
CY7C4841
CY7C4851
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PDF
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PDCR 900
Abstract: SH6610C PDCR 900 -1956 SEGMENT DISPLAY 312H 309H
Text: SH66L08 1K 4-bit Microcontroller with LCD Driver Features SH6610C-based single-chip 4-bit microcontroller with LCD driver ROM: 1024 X 16 bits RAM: 256 X 4 bits data memory Operation Voltage Range: 1.2V - 1.7V 16 CMOS I/O pins (PORTC, D can switch to segment)
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SH66L08
SH6610C-based
768KHz
768KHz
4/131KHz
131KHz
dutyEG13
SEG14
PDCR 900
SH6610C
PDCR 900 -1956
SEGMENT DISPLAY 312H
309H
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PDF
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SH67P33X
Abstract: No abstract text available
Text: SH67P33 OTP 4-bit Micro-controller Features SH6610C-based single-chip 4-bit micro-controller ROM: 1K X 16 bits OTP ROM RAM: 48 X 4 bits RAM Data Memory Operation voltage: 1.8V - 3.6V (Typical: 3.0V) 16 CMOS bi-directional I/O pins and 1 COMS input pin 4-level subroutine nesting (including interrupts)
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Original
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SH67P33
SH6610C-based
400kHz
SH67P33X
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PDF
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PD650C
Abstract: PD80C49C PD7801G UPD650C 64x8 PD650 uCOM84 MPD7801G UPD80C48C PD7800G
Text: • 4-Bit Single-Chip M icrocom puters Process Supply Voltage V Instruction Time ROM x8 RAM I/O CMOS +5 10 2k 1k 9 6 x4 6 4 x4 4 bit X 8 3 bit 42-pin DIP /(PD652C 1k 3 2 x4 4 bit X 5 1 bit 28-pin DIP /íPD7502G ííPD7503G 2k •4k 128x4 224 x 4 4 bit X 5
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OCR Scan
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COM43C
uPD650C
uPD651C
uPD652C
uPD7502G
uPD7503G
uPD7506C
COM7500
uPD7507SC
/iPD7507C
PD650C
PD80C49C
PD7801G
64x8
PD650
uCOM84
MPD7801G
UPD80C48C
PD7800G
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PDF
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52212HR
Abstract: IN3064 256X4 ncr 400 256x4 static ram
Text: C 52212 R 1K BIT 2 5 6 x 4 NVRAM 1K Bit Static RAM backed by 1K Bit Electrically Erasable PROM Fully 5V Only Operation Directly TTL Compatible In Circuit E2PROM Changes SRAM Cycle Time less than 300 ns • • • • Power-Failure Protection Unlimited Recall Cycles
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OCR Scan
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256x4)
52212HR
IN3064
256X4
ncr 400
256x4 static ram
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PDF
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IMS1223P-25
Abstract: IMS1223P-35 IMS1223P-45 IMS1223S-25 IMS1223S-35 IMS1223S-45
Text: IMS1223 CMOS High Performance 1K x 4 Static RAM mos FEATURES DESCRIPTION • INM OS'Very High Speed CMOS • • • • • • • • • • Advanced Process - 1.6 Micron Design Rules 1K x 4 Bit Organization 25, 35, and 45 nsec Access Times 25, 35, and 45nsec Chip Enable Access Times
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OCR Scan
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IMS1223
45nsec
300-mll
IMS1223
IMS1223P-25
IMS1223P-35
IMS1223P-45
IMS1223S-25
IMS1223S-35
IMS1223S-45
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PDF
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rj017
Abstract: No abstract text available
Text: IN T E GR AT ED DEVIC E 3fiE » • 4 Ô 2 S 77 1 DDG'lOig S B 1K X 36 2Kx36 CMOS DUAL-PORT STATIC RAM MODULE |cfty Integrated Dei/ice Technology, Inc. IDT PRELIMINARY IDT7M1011 J J ? 012 S 3- \4 FEATURES DESCRIPTION • High density 1K/2K x 36 CM OS Dual-Port Static RAM
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OCR Scan
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2Kx36
IDT7M1011
121-pin
IDT7M1011/1DT7M1012
4A25771
MIL-STD883,
7M1011
7M1012
rj017
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PDF
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buzzer circuit
Abstract: 32.768 MHZ OSCILLATOR NOT GIVING OUTPUT QFP160-P-2828 SM3513 sis8 dio8
Text: SHARP SM3513 4-Bit Single-Chip Microcomputer Data Sheet FEATURES • ROM Capacity - Program ROM 24K x 23-bits - Character ROM 6 x 8 x 256-bits - Constant ROM 1K x 4-bits • RAM Capacity - Working RAM 256 x 4-bits - Display RAM 74 x 32-bits - Data RAM 512 x 8-bits
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OCR Scan
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SM3513
23-bits
256-bits
32-bits
buzzer circuit
32.768 MHZ OSCILLATOR NOT GIVING OUTPUT
QFP160-P-2828
SM3513
sis8
dio8
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PDF
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LH5101
Abstract: LH5101-30 intel 5101 5101 static ram
Text: LH5101 CMOS 1K 256 x 4 Static RAM FEATURES DESCRIPTION • 256 x 4 bit organization • Access time: 300 ns (MAX.) The LH5101 is a static RAM organized as 256 x 4 bits. It is fabricated using silicon-gate CMOS process technology. • Low-power consumption:
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OCR Scan
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LH5101
22-pin,
300-mil
28-PIN
LH5101
LH5101-30
LH5101-30
intel 5101
5101 static ram
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PDF
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1K x 4 static ram ttl
Abstract: lh5114
Text: LH5114 CMOS 4K 1K 4 Static RAM x DESCRIPTION FEATURES • 1,024 x 4 bit organization • Access tim e: • Power consumption: The LH5114H is a static RAM organized as 1,024 4 bits. It is fabricated using silicon-gate CMOS proc ess technology. x 150 ns (MAX.)
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OCR Scan
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LH5114
LH5114H
18-pin,
300-mil
14H-3
LH5114H-15
1K x 4 static ram ttl
lh5114
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PDF
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256X4
Abstract: 1024x4 AM2168 Am91L22
Text: MOS Memory MOS Memory Functional Index and Selection Guide 1K STATIC RAMS Part Number Am 9122-25 A m 9122-35 Am91L22-35 Am91 L22-45 Am9122-60 Organization 256 x 4 256 x 4 256 x 4 256x4 256 x 4 Acceee Tlme ns 25 35 36 45 60 Power DMpation(mW ) Standby - Active
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OCR Scan
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Am91L22-35
L22-45
Am9122-60
256x4
Am2147
Am2147-45
Am2147-65
Am2147-70
Am21L47-45
Am21147
1024x4
AM2168
Am91L22
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PDF
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Untitled
Abstract: No abstract text available
Text: 1K x 36 2K x 36 CMOS DUAL-PORT STATIC RAM MODULE PRELIMINARY IDT7M1011 IDT7M1012 FEATURES DESCRIPTION • T h e ID T 7 M 1 0 1 1/1 012 are 1K/2K x 3 6 high speed C M O S D ual-Port static RAM modules constructed on a co-fired ceram ic substrate using 4 ID T 7 0 1 0 1 K x 9 Dual-Port RAMs
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OCR Scan
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IDT7M1011
IDT7M1012
IDT7M1011/IDT7M1012
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PDF
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LH5114H15
Abstract: lh5114 1K x 8 static ram LH5114H 1K x 4 static ram ttl 1k x 4
Text: LH5114 CMOS 4K 1K x 4 S ta tic RAM FEATURES DESCRIPTION • 1,024 x 4 bit organization The LH5114H is a static RAM organized as 1,024 x 4 bits. It is fabricated using silicon-gate CMOS proc ess technology. • Access time: 150 ns (MAX.) • Power consumption:
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OCR Scan
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LH5114
18-pin,
300-mil
LH5114H
20-PIN
5114H-3
LH5114H-15
LH5114H15
lh5114
1K x 8 static ram
1K x 4 static ram ttl
1k x 4
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PDF
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ic 5101 ram
Abstract: 5101 RAM LH5101 LH5101-30 5101 cmos ram intel 5101 1K x 8 static ram 5101 static ram
Text: LH5101 CMOS 1K 256 4 Static RAM x FEATURES DESCRIPTION • 256 • Access time: 300 ns (MAX.) The LH5101 is a static RAM organized as 256 x 4 bits. It is fabricated using silicon-gate CMOS process technology. • Low-power consumption: Standby: 10 (.tA x
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OCR Scan
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LH5101
22-pin,
300-mil
LH5101
LH5101-30
ic 5101 ram
5101 RAM
LH5101-30
5101 cmos ram
intel 5101
1K x 8 static ram
5101 static ram
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PDF
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Untitled
Abstract: No abstract text available
Text: P4C151 ULTRA HIGH SPEED 1K x 4 RESETTABLE CACHE-TAG STATIC CMOS RAM SCRAM x f - FEATURES • Single Power Supply - 5V ±10% ■ Full CMOS, 6T Cell ■ High Speed (Equal Access and Cycle Times)
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OCR Scan
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P4C151
MIL-STD-883C
P4C151
-10PC
-12PC
-12DC
-15PC
-15DC
-20PC
-20DC
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PDF
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a26c
Abstract: 1K x 8 static ram 1k BIT WORD STATIC RAM MOSTEK MEMORY MOSTEK ROM MK4801A-90 Mostek MK4801 MK4801A Bipolar ROM 1K X 4
Text: MQSTEK 1K x 8-BIT STATIC RAM MK4801 A P /J /N Series □ High perform ance FEATURES □ Static operation Part No. Access Time □ Organization: 1K x 8 bit RAM JEDEC pinout □ Pin com patible w ith M ostek's BYTEWYDE m em ory fam ily □ 2 4 /2 8 pin R O M /P R O M com patible pin configuration
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OCR Scan
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MK4801
MK4801A-55
MK4801A-70
MK4801A-90
MK4801A
DQ211
VSS12C
14DQ4
a26c
1K x 8 static ram
1k BIT WORD STATIC RAM
MOSTEK MEMORY
MOSTEK ROM
Mostek
Bipolar ROM 1K X 4
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PDF
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Untitled
Abstract: No abstract text available
Text: fax id: 5200 C Y 7 C 1 3 0 /C Y 7 C 1 31 W CYPRESS C Y 7 C 1 4 0 /C Y 7 C 1 41 1K x 8 Dual-Port Static Ram Features Functional Description True Dual-Ported memory cells which allow sim ulta neous reads of the same mem ory location 1K x 8 organization 0.65-micron CMOS for optimum speed/power
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OCR Scan
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65-micron
CY7C130/CY7C131
CY7C140/CY7C141
CY7C130/CY7C131;
48-pin
CY7C130/140)
52-pin
IDT7130/IDT7140
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PDF
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