Untitled
Abstract: No abstract text available
Text: 32K x 32 SRAM MODULE PUMA 2S1000 - 025/35/45 Issue 4.5 : August 2002 Elm Road, West Chirton, North Shields, Tyne and Wear, NE29 8SE England, Tel. +44 0191 2930500 Fax. +44 (0191) 2590997 Description The PUMA 2S1000 is a 1Mbit high speed static RAM organised as 32K x 32 in a 66 pin ceramic PGA
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Untitled
Abstract: No abstract text available
Text: \9» ¡¿>tt PUMA 2S1000 molate PUMA 2S1000-35/45/55/70 Issue 3.0 : January 1992 ADVANCE PRODUCT INFORMATION Sem iconductor /"• Pin Definition Inc. 1,048,576 bit CMOS High Speed Static RAM \ 1 12 23 o o O De WE2 015 O _a o D9 CS2 D U o o o Features Very Fast access times of 35/45/55/70 ns.
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2S1000
2S1000-35/45/55/70
MIL-STD-883C.
A10wer
S1000
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2S100
Abstract: No abstract text available
Text: PUMA 2S1000 moìaic PUMA 2S1000-020/025 Issue 1.2: April 1992 ADVANCE PRODUCT INFORMATION S e m ic o n d u c to r - Pin Definition 1,048,576 bit CMOS High Speed Static RAM 1 Features User Configurable as 8,16 or 32 bit wide Very Fast access times of 20/25 ns.
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2S1000
2S1000-020/025
883-D.
ADDRESSOEWE4WE51
2S1000LMB-020
S1000
2S100
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Untitled
Abstract: No abstract text available
Text: mosaic / f a — ^ 3 2 K x 3 2 SRAM M O D U LE semiconductor, inc. 2S1000-025/35/45 Issue4.1 : February 1996 Description The PUMA 2S1000 is a 1Mbit high speed static RAM organised as 32K x 32 in a 66 pin ceramic PGA package. Access times of 25ns, 35ns or
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PUMA2S1000-025/35/45
2S1000
MIL-STD-883.
35337cJ
000247fl
PUMA2S1000-25/35/45
LMB-35
32Kx32
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Untitled
Abstract: No abstract text available
Text: F te i PUMA 2S1000 molate PUMA 2S1000-020/025 Issue 1.1: February 1992 ADVANCE PRODUCT INFORMATION S e m ic o n d u c to r " ^ Pin Definition 1,048,576 bit CMOS High Speed Static RAM 1 Features User Configurable as 8,16 or 32 bit wide Very Fast access times of 20/25 ns.
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2S1000
2S1000-020/025
883-C.
S1000
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Untitled
Abstract: No abstract text available
Text: M* 1 *1 _ P U M A 2 S 1 0 0 0 _ mol aic PUMA 2S1000-35/45/55/70 Issue 3.1 : April 1992 ADVANCE PRODUCT INFORMATION Mosaic S em iconductor Inc. f Pin Definition 1,048,576 bit CMOS High Speed Static RAM 1 Features Very Fast access times of 35/45/55/70 ns.
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2S1000-35/45/55/70
MIL-STD-883D
S1000
CA92121
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Untitled
Abstract: No abstract text available
Text: mosaic 32K X 32 SRAM MODULE semiconductor, inc. PUMA 2S1000-12/15 Issue 4 .2 : June 1996 Description The PUMA 2S1000 is a 1Mbit high speed static RAM organised as 32K x 32 in a 66 pin PGA package. Access times of 120ns or 150ns are available. The devices has a user configurable
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2S1000-12/15
2S1000
120ns
150ns
MIL-STD-883.
b3S337T
2S1000LMB-12
128Kx8
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D3157
Abstract: ACS 085 2S100 D3058
Text: 32K x 32 SRAM MODULE PUMA 2S1000 - 020/025/35/45 11403 West Bernado Court, Suite 100, San Diego, CA 92127. Tel No: 619 674 2233, Fax No: (619) 674 2230 Description Issue 4.3 : November 1998 The PUMA 2S1000 is a 1Mbit high speed static RAM organised as 32K x 32 in a 66 pin ceramic PGA
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2S1000
MIL-STD-883.
D3157
ACS 085
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D3058
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cs1c
Abstract: Wt-14
Text: PUMA 2S1000 molate PUMA 2S1000-35/45/55/70 Issue 3.2 : M AY 1992 ADVANCE PRODUCT INFORMATION M o sa ic S e m ic o n d u c to r Pin Definition Inc. 1,048,576 bit CMOS High Speed Static RAM Features Very Fast access times of 35/45/55/70 ns. Configurable as 32 / 1 6 / 8 bit wide output.
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2S1000
2S1000-35/45/55/70
MIL-STD-883,
S1000
64Kx16and128Kx8)
cs1c
Wt-14
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Untitled
Abstract: No abstract text available
Text: 32K X 32 SRAM MODULE mosaic semiconductor, inc. PUMA 2S1000 - 020/025/35/45 11403 West Bernado Court, Suite 100, San Diego, CA 92127. Tel No: 619 674 2233, Fax No: (619) 674 2230 Issue 4.3 : N o vem b er 1998 Description 1,048,576 bit CMOS High Speed Static RAM
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2S1000
MIL-STD-88yTemperature.
MIL-STD-883.
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Untitled
Abstract: No abstract text available
Text: 3 tnt PUMA 2S1000 molate PUMA 2S1000-35/45/55/70 Issue 3.2 : MAY 1992 ADVANCE PRODUCT INFORMATION S e m ic o n d u c to r C Pin Definition 1,048,576 bit CMOS High Speed Static RAM 1 Features Very Fast access times of 35/45/55/70 ns. Configurable as 32 / 1 6 / 8 bit wide output.
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2S1000
2S1000-35/45/55/70
MIL-STD-883,
A11emperature
S1000
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Untitled
Abstract: No abstract text available
Text: ft?* «B PUMA 2S1000 molate PUMA 2S1000-020/025 Issue 1.2: April 1992 ADVANCE PRODUCT INFORMATION S e m ic o n d u c to r Inc. ' \ Pin Definition 1,048,576 bit CMOS High Speed Static RAM Features User Configurable as 8,16 or 32 bit wide Very Fast access times of 20/25 ns.
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2S1000
2S1000-020/025
883-D.
S1000
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Untitled
Abstract: No abstract text available
Text: 32K x 32 SRAM MODULE PUMA 2S1000 - 025/35/45 Issue 4.5 : August 2002 Elm Road, West Chirton, North Shields, Tyne and Wear, NE29 8SE England, Tel. +44 0191 2930500 Fax. +44 (0191) 2590997 Description The PUMA 2S1000 is a 1Mbit high speed static RAM organised as 32K x 32 in a 66 pin ceramic PGA
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MIL-STD-883.
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D3157
Abstract: No abstract text available
Text: 32K x 32 SRAM MODULE PUMA 2S1000 - 020/025/35/45 Issue 4.4 : April 2001 Description The PUMA 2S1000 is a 1Mbit high speed static RAM organised as 32K x 32 in a 66 pin ceramic PGA package. Access times of 20ns, 25ns, 35ns or 45ns are available. The device has a user configurable
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Untitled
Abstract: No abstract text available
Text: mosaic 32Kx 32 SRAM MODULE PUMA 2S1000-55/70/85/10 semiconductor, inc. Issue 4.2 : June 1996 Description The PUMA 2S1000 is a 1Mbit high speed static RAM organised as 32K x 32 in a 66 pin PGA package. Access times of 55ns, 70ns, 85ns or 100ns are available. The devices has a user
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PUMA2S1000
100ns
MIL-STD-883.
2S1000-55/70/85/10
D00S4ab
2S1000LMB-55
128Kx8
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Untitled
Abstract: No abstract text available
Text: PUMA 2S1000 Issue 1.0: October 1989 PUMA 2S1 000 1 Megabit CMOS SRAM PUMA ADVANCE PRODUCT INFORMATION 1,048,576 CMOS High Speed SRAM Features Pin Definition User Configurable as 8,16, or 32 bit wide Fast Access Times of 45/55/70/85/100/120 nS Operating Power:1000mW typ. , 32 bit mode
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2S1000
1000mW
500mW
250mW
MIL-STD-883C
A0-14
D0-D31
DB-15
D16-23
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Untitled
Abstract: No abstract text available
Text: PUMA 2S1000 molate PUMA 2S1000-85/10/12/15 issue 3.0 : August 1990 S e m ic o n d u c to r Pin Definition inc. 1,048,576 bit CMOS High Speed Static RAM Features User Configurable as 8,16 or 32 bit wide Fast access times of 85/100/120/150 ns Pin grid array gives 2:1 improvement over DIL
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2S1000-85/10/12/15
160mw
MIL-STD-883C
S1000
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3S1000FG456-4C
Abstract: PCI64 vhdl code for 8 bit parity generator vhdl code for parity checker 2-S200
Text: LogiCORE PCI64 Interface v3.0 DS205 April 14, 2003 Introduction LogiCORE Facts With the Xilinx LogiCORE PCI Interface, a designer can build a customized PCI 2.3-compliant core with the highest possible sustained performance, 528 Mbytes/sec. Features •
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PCI64
DS205
64-bit,
32-bit
64/32-bit
PCI64/33
3S1000FG456-4C
vhdl code for 8 bit parity generator
vhdl code for parity checker
2-S200
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2S100
Abstract: SPARTAN-II 2S30 what the difference between the spartan and virtex 2S15 2S50 CS144 FG256 PQ208 TQ144
Text: Spartan-II Family FAQ 1. What is the Spartan-II family? The Spartan-II family is the next generation family of the Spartan Series based on the industry-leading Virtex architecture. The Spartan-II family extends the portion of the ASIC market that Xilinx can address, while
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XC2S150-6
XC2S150-5.
2S100
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2S30
what the difference between the spartan and virtex
2S15
2S50
CS144
FG256
PQ208
TQ144
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1200ap
Abstract: PCM1701P Burr-Brown 3400B pcm65p pcm1701 4203SQ mp8316 DAC800-CBI-V MPC8S 4203j
Text: Burr-Brown Corporation Discontinued Products August 2, 1999 Model 0025MK 0100AP 0100MS-1 0100MS-2 0100MS-3 0100MS-4 0145MC 01AA-A1030-00 01DSA00024A001 01DSA00080A001 01DSA00236A002 01DSA00236A010 01DSA01898A003 0211B 0245MC 0422MC 0501-3A 0503A 0506/16 0506/16A
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0025MK
0100AP
0100MS-1
0100MS-2
0100MS-3
0100MS-4
0145MC
01AA-A1030-00
01DSA00024A001
01DSA00080A001
1200ap
PCM1701P
Burr-Brown 3400B
pcm65p
pcm1701
4203SQ
mp8316
DAC800-CBI-V
MPC8S
4203j
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PAX 930
Abstract: CU2Y-50
Text: 4 Components for Base Stations 7/16 Connectors Telegärtner 7/16 Connectors The RF connectors in the 7/16 series are screw thread rugged connectors to be found in high perfo rm ance transm itter applicatio ns.Th e 7/16 connectors are w aterp ro o f and are suitable
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D-71140
2S-100
PAX 930
CU2Y-50
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Untitled
Abstract: No abstract text available
Text: 2 7 1993 ANALOG ► DEVICES AC Vector Processor FEATURES Complete Vector Coordinate Transformation on Silicon Mixed Signal Data Acquisition Three-Phase 120° and Orthogonal 90° Signal Transformation Three-Phase Balance Diagnostic —Homopolar Output APPLICATIONS
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AD2S100
44-Lead
P-44A)
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2S100PQ208
Abstract: 2S200EPQ208-6C 2S50PQ208-5C 2S50PQ208 PCI32 PCI64 2S100EPQ208-6C 2S50PQ208-5 2S100PQ208-5C 2s200pq208-5
Text: LogiCORE PCI32 Interface v3.0 DS 206 v1.2 July 19, 2002 Introduction Data Sheet, v3.0.100 LogiCORE Facts With the Xilinx LogiCORE PCI Interface, a designer can build a customized, fully PCI 2.3-compliant core with the highest possible sustained performance, 528 Mbytes/sec.
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PCI32
PCI64
64/32-bit,
DO-DI-PCI32-SP
DO-DI-PCI32-IP
2S100PQ208
2S200EPQ208-6C
2S50PQ208-5C
2S50PQ208
2S100EPQ208-6C
2S50PQ208-5
2S100PQ208-5C
2s200pq208-5
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RFC1662
Abstract: crc verilog code 16 bit fifo generator xilinx datasheet spartan 4046 application circuits PLX9080 RFC1619
Text: PPP8 HDLC Core CC318f February 14, 2000 Product Specification AllianceCORE C ooreEl Facts Core Specifics See Table 1 Provided with Core Documentation Product Brief Datasheet Design Document Test Bench Design Document Test Scripts Design file formats
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CC318f)
RFC1619
RFC1662
RFC1662
crc verilog code 16 bit
fifo generator xilinx datasheet spartan
4046 application circuits
PLX9080
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