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    32KX16 150NS Search Results

    32KX16 150NS Result Highlights (3)

    Part ECAD Model Manufacturer Description Download Buy
    X28C512DM-15 Rochester Electronics LLC X28C512 - EEPROM, 64KX8, 150ns, Parallel, CMOS, CDIP32 Visit Rochester Electronics LLC Buy
    X28C512JI-15 Rochester Electronics LLC X28C512 - EEPROM, 64KX8, 150ns, Parallel, CMOS, PQCC32 Visit Rochester Electronics LLC Buy
    X28C010FI-15 Rochester Electronics LLC X28C010 - EEPROM, 128KX8, 150ns, Parallel, CMOS, CDFP32 Visit Rochester Electronics LLC Buy

    32KX16 150NS Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    16-Bit Microprocessors

    Abstract: ELECTRONIC ARRAYS memory
    Text: m o EDI9F3420C \ ELECTRONIC DESIGNS INC. • Combination SRAM/FLASH/EEPROM Module Mixed Technology Memory Module 128Kx16 SRAM, 128Kx16 Flash and 32Kx16 EEPROM The EDI9F3420C combines data SRAM , program (FLASH) and boot (EEPROM) memory anrays in a single


    OCR Scan     		EDI9F3420C 128Kx16 32Kx16 EDI9F3420C EDI9F3420C, 110ns. 130ns, 150ns. 16-Bit Microprocessors ELECTRONIC ARRAYS memory PDF

    32Kx16 150ns

    Abstract: No abstract text available
    Text: ^EDI EDI9F3420C ELECTRONIC DESIGNS INC. • Combination SRAM/FLASH/EEPROM Module Mixed Technology Memory Moduie 128Kx16 SRAM, 128Kx16 Flash and 32Kx16 EEPROM Features The EDI9F3420C combines data SRAM , program (FLASH) and boot (EEPROM) memory arrays in a single


    OCR Scan     		128Kx16 32Kx16 120ns 150ns EDI9F3420C EDI9F3420C 32Kx16 150ns PDF

    Untitled

    Abstract: No abstract text available
    Text: EDI9F3420C m a ELECTRONIC DESIGNS INC.- Combination SRAM/FLASH/EEPROM Module Pin Configuration and Block Diagram Mixed Technology Memory Module 128Kx16 SRAM, 128Kx16 Flash and 32Kx16 EEPROM Features vss vcc Mixed Technology Memory Module with 128Kx16 bit CMOS SRAM,


    OCR Scan     		EDI9F3420C 128Kx16 32Kx16 120ns 150ns EDI9F3420C PDF

    A934

    Abstract: No abstract text available
    Text: ^EDI EDI9F3420C ELECTRONIC DESIGNS INC.- Combination SRAM/FLASH/EEPROM Module Pin Configuration and Block Diagram Mixed Technology Memory Module 128Kx16 SRAM, 128Kx16 Flash and 32Kx16 EEPROM A0-A16 vss vcc Features Mixed Technology Memory Module with !28Kx16 bit CMOS SRAM,


    OCR Scan     		EDI9F3420C 128Kx16 32Kx16 120ns 150ns EDI9F3420C A934 PDF

    Untitled

    Abstract: No abstract text available
    Text: moi EDI8F1664C100/120/150 Megabit SRAM Module, JEDEC Pinout 64KX16 Static RAM CMOS, Module Features The EDI8F1664C is a high speed 64Kx16 CMOS Static RAM Module. The module consists of four 4 32Kx8 CMOS Static RAMs in plastic small outline packages, surface mounted onto an epoxy laminate (FR-4)


    OCR Scan     		EDI8F1664C100/120/150 64KX16 EDI8F1664C 32Kx8 32Kx8 32Kx16 DQ8-DQ15) EDI8F1664C100/120/150 PDF

    150-110

    Abstract: No abstract text available
    Text: EDI8F1664C100/120/150 mo\ Megabit SRAM Module, JEDEC Pinout 64Kx16 Static RAM CMOS, Module Features The EDI8F1664C is a high speed 64Kx16 CMOS Static RAM Module. The module consists of four 4 32Kx8 CMOS Static RAMs in plastic small outline packages, surface mounted onto an epoxy laminate (FR-4)


    OCR Scan     		EDI8F1664C100/120/150 64Kx16 EDI8F1664C 32Kx8 32Kx16 DQ8-DQ15) EDI8F1664C100/120/1SO EDI8F1664C100/120/150 150-110 PDF

    Untitled

    Abstract: No abstract text available
    Text: W DI DI8F1664C Commercial Megabit SRAM Module Electronic D«algn* In c . " 64Kx16 Static RAM CMOS, Module Features The EDI8F1664C is a high speed 64Kx16 CMOS Static RAM Module consisting of four 4 32Kx8 CMOS Static RAMs. The 32Kx8 RAMs are organized as two banks of


    OCR Scan     		64KX16 150ns DI8F1664C EDI8F1664C 32Kx8 32Kx16 PDF

    uua 170

    Abstract: SRAM 64Kx16 t1is 32Kx16 150ns 327a3
    Text: ELECTRONIC DESIGNS INC 3DE D m a • 3530114 GOGGbMS 7 ■ EDI8F1664C m c lr o o lo D*«lgn< In c.* Commercial Megabit SRAM Module 64Kx16 Static RAM CMOS, Module Features The EDI8F1664C is a high speed 64Kx16 CMOS 64Kx16 bit CMOS Static Static RAM Module consisting offour 4 32Kx8CMOS Random Access Memory Module


    OCR Scan     		EDI8F1664C 64Kx16 EDI8F1664C 32Kx8CMOS 32Kx8 32Kx16 DQ8-DQ15) 3S3Q114 uua 170 SRAM 64Kx16 t1is 32Kx16 150ns 327a3 PDF

    Untitled

    Abstract: No abstract text available
    Text: □PM D P E 3 2 X 1 6 A Dense-Pac Microsystems, Inc. 32K X 16 CMOS EEPROM HALF-PAC O DESCRIPTION: The DPE32X16AV is a high-performance Electrically Erasable and Programmable Read O nly Memory EEPRO M module and may be organized as 32K X 16, or 64K X 8.


    OCR Scan     		DPE32X16AV DPE32X16A 16-bit 64-BW 500mV PDF

    Untitled

    Abstract: No abstract text available
    Text: Cdpm DPS8M612 Dense-Pac Microsystems, Inc. 3 2 K X 1 6 C M O S SRA M M O D U LE O DESCRIPTIO N: The D P S 8 M 6 1 2 is a one megabit Static Random Access M em ory SRAM , complete with memory interface logic and on-board capacitors, organized as 32K X 16 bits.


    OCR Scan     		DPS8M612 150ns S8M612 100ns 120ns 32KX16 30A004-04 PDF

    Untitled

    Abstract: No abstract text available
    Text: DENSE-PAC 0.5 Megabit UVEPROM MICROSYSTEMS DPV32X16A DESCRIPTION: The DPV32X16A is a 40-pin Pin Grid Array PGA consisting of tw o 32K X 8 UVEPROM devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate w ith matched thermal coefficients.


    OCR Scan     		DPV32X16A DPV32X16A 40-pin 250ns 120ns 150ns 200ns 64KX8 32KX16 00G138S PDF

    Untitled

    Abstract: No abstract text available
    Text: _ ' / f ' _ DENSE-PAC 0.5 Megabit UVEPROM D P V3 2 X 16A MICROSYSTEMS DESCRIPTION: The DPV32X16A is a 40-pin Pin Grid Array PGA consisting of two 32K X 8 UVEPROM devices in ceramic LCC packages surface mounted on a co-fired


    OCR Scan     		DPV32X16A 40-pin 250ns 120ns 150ns 170ns 200ns 250ns 64KXB 32KX16 PDF

    Untitled

    Abstract: No abstract text available
    Text: □PM Dense-Pac Microsystems. Ino DPE8M612 32K X 16 CMOS EEPROM MODULE O DESCRIPTION: The DPE8M612 is a high-performance Electrically Erasable and Programmable Read Only Memory EEPROM module and may be organized as 32K X 16 or 64K X 8. The module is built with two low-power CMOS 32K X 8


    OCR Scan     		DPE8M612 DPE8M612 16-bit 64-BW* 500mV PDF

    Untitled

    Abstract: No abstract text available
    Text: DPS8M612 Dense-Pac Microsystems, Inc. 32KX 16 C M O S SRA M M O D U LE O DESCRIPTIO N: The D P S 8 M 6 1 2 is a one megabit Static Random Access M em ory SRAM , complete with memory interface logic and on-board capacitors, organized as 32K X 16 bits. The D P S 8 M 6 1 2 is ideally suited for high performance


    OCR Scan     		DPS8M612 150ns I/013 32KX16 PDF

    Untitled

    Abstract: No abstract text available
    Text: □P M 7 Dense-Pac Microsystems, Inc. ' DPS8M 612 32KX 16 C M O S SRAM MODULE O DESCRIPTIO N: The D P S 8 M 6 1 2 is a one megabit Static Random Access M em ory SRAM , complete with memory interface logic and on-board capacitors, organized as 32K X 16 bits.


    OCR Scan     		150ns 40-Pin DPS8M612 120ns 32KX16 30A00-WM PDF

    Untitled

    Abstract: No abstract text available
    Text: DPS8X16A □PM Dense-Pac Microsystems, Inc. H IG H SPEED 8 K X 16 C M O S S R A M P G A M O D U L E O PRELIMINARY DESCRIPTIO N: The DPS8X16A is a 40-pin Pin Grid Array PGA consisting of two 8 K X 8 SR A M devices in ceramic LCC packages surface mounted on a co-fired ceramic


    OCR Scan     		DPS8X16A DPS8X16A 40-pin 150ns 100ns 120ns 32KX16 30A05000 PDF

    Untitled

    Abstract: No abstract text available
    Text: □PM D P S 3 2 X 16A Dense-Pac Microsystems, Inc. ^ H IG H S PEED 32K X 16 C M O S S R A M P G A M O D U L E PRELIMINARY D ESC R IPT IO N : The DPS32X16A is a 40-pin Pin Grid Array PGA consisting of two 32K X 8 SR A M devices in ceramic LCC packages surface mounted on a co-fired ceramic


    OCR Scan     		DPS32X16A 40-pin 150ns 100ns 120ns 32KX16 PDF

    Untitled

    Abstract: No abstract text available
    Text: ^ Dense-Pac Microsystems, I n c ^ ^ ^ DPS8X16A H |C H s p EEp ^ x 16 C M O S SR A M P G A M O D U L E PRELIMINARY DESCRIPTION: The DPS8X16A is a 40-pin Pin Grid Array P G A consisting of two 8K X 8 SRAM devices in ceram ic LC C packages surface mounted on a co-fired ceram ic


    OCR Scan     		DPS8X16A DPS8X16A 40-pin 150ns S8X16 100ns 120ns 32KX16 30A050-00 PDF

    Untitled

    Abstract: No abstract text available
    Text: DPS32X16A □PM Dense-Pac Microsystems, Inc. O H IG H SPEED 3 2 K X 16 C M O S S R A M P G A M O D U L E PRELIM INARY DESCRIPTIO N: The DPS32X16A is a 40-pin Pin Grid Array PGA consisting of two 32K X 8 S R A M devices in ceramic LCC packages surface mounted on a co-fired ceramic


    OCR Scan     		DPS32X16A DPS32X16A 40-pin 150ns Ope55 100ns 120ns 32KX16 30A050-01 PDF

    Untitled

    Abstract: No abstract text available
    Text: □P M V Dense-Pac Microsystems, Inc. ^ DPE32X16A 32K X 16 CMOS EEPROM HALF-PAC O D ESCR IPTIO N : The D PE32X16A V is a high-performance Electrically Erasable and Programmable Read O n ly M em ory E E P R O M module and may be organized as 32K X 16, or 64K X 8.


    OCR Scan     		DPE32X16A PE32X16A DPE32X16A 16-bit 64-BW 30A053-00 PDF

    MAS281 Marconi Electronic Devices

    Abstract: mil std 1553b 1750A processor architecture Z800X microprocessor radiation hard Marconi radiation hard 8086 microprocessor block diagrammed with direction C501A 1553B MA3692
    Text: Marconi Electronic Devices M A 3692_ Radiation Hard M il Std 1553BTO 16-Bit Processor In terface ADVANCED IN FO R M A TIO N FEATURES GENERAL DESCRIPTION • R ad iatio n Hard to 1M Rad(Si) The M A3692 is a m ulti-function device fo r interfacing


    OCR Scan     		MA3692 1553B 16-Bit MA3690/1 MA3692 MIL-M-38510 MAS281 Marconi Electronic Devices mil std 1553b 1750A processor architecture Z800X microprocessor radiation hard Marconi radiation hard 8086 microprocessor block diagrammed with direction C501A PDF

    3654P

    Abstract: DRAM 4464 jeida dram 88 pin MB814260 4464 dram 1024M-bit 4464 64k dram MB81G83222-008 mb814400a-70 4464 ram
    Text: To Top / Lineup / Index Product Line-up Memory Volatile memory 4M-bit DRAM 5.0V RAM 4M-bit DRAM (3.3V) 16M-bit DRAM (5.0V) 16M-bit DRAM (3.3V) 16M-bit SDRAM 64M-bit SDRAM SGRAM DRAM Modules (5.0V) DRAM Modules (3.3V) SDRAM Modules Non-Volatile memory Rewritable


    Original     		16M-bit 64M-bit 68-pin) 88-pin) MB98C81013-10 MB98C81123-10 MB98C81233-10 MB98C81333-10 3654P DRAM 4464 jeida dram 88 pin MB814260 4464 dram 1024M-bit 4464 64k dram MB81G83222-008 mb814400a-70 4464 ram PDF

    diac kr 206

    Abstract: LT 8521 ND4700 ND4700-BRG LT 5219
    Text: Big Dipper R4400/R4600/R4700 PCI Bus Bridge ND4700-BRG Chapter 1. Overview Cache tag SRAM Interface ND4700-BRG Big Dipper is a CPU local bus and PCI bus controller chip designed for use with MIPS Cache & tag SRAM test Interface R4400/R4600/R4700. Its main function is as follows.


    OCR Scan     		R4400/R4600/R4700 ND4700-BRG R4400/R4600/R4700. R4400/R4600/ R4700 ND4700-MEC. 32-bit arbite5-77 ND4700LQF-BRG diac kr 206 LT 8521 ND4700 ND4700-BRG LT 5219 PDF

    ST10F166

    Abstract: ST10R166 ST10 ST10166 pec 820 st10 Bootstrap
    Text: ST10F166 FAMILY 16-BIT MCU USER MANUAL 2ND EDITION FEBRUARY 1996 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED. SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics.


    Original     		ST10F166 16-BIT ST10R166 ST10 ST10166 pec 820 st10 Bootstrap PDF