CY7C1367A
Abstract: GVT71512C18 4947a
Text: CY7C1366A/GVT71256C36 CY7C1367A/71512C18 256K x 36/512K x 18 Synchronous Pipelined SRAM Features 18 SRAM cells with advanced synchronous peripheral circuitry and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a
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CY7C1366A/GVT71256C36
CY7C1367A/GVT71512C18
36/512K
100-Pin
1-85050-A
119-Lead
CY7C1367A
GVT71512C18
4947a
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PDF
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EPM5128LC
Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2148-35C CY21L48-35C CY7C168A-35C CY7C168A-25C 5962-8871309XX 5962-89839112X CY2148-35C CY7C148-35C CY7C168A-45M CY7C168A-35M+ 5962-8871310RX 5962-8983913RX CY2148-35M CY7C148-35M CY7C169A-35C
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CY2148-35C
CY21L48-35C
CY7C168A-35C
CY7C168A-25C
5962-8871309XX
5962-89839112X
CY7C148-35C
CY7C168A-45M
CY7C168A-35M+
EPM5128LC
IDT CYPRESS CROSS REFERENCE clocks
epm5064lc-1
EPM5128LC-1
EPM5064LC
EPM5128LC-2
EPM5128GI
EPM5128JC-1
8464c
5962-8871309
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PDF
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CY7C1367A
Abstract: GVT71512C18 4947a SRAM controller
Text: CY7C1366A/GVT71256C36 CY7C1367A/71512C18 256K x 36/512K x 18 Synchronous Pipelined SRAM Features • Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns • Fast clock speed: 225 MHz, 200 MHz, 166 MHz, and 150 MHz • Fast OE access times: 2.5 ns, 3.0 ns, and 3.5 ns
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Original
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CY7C1366A/GVT71256C36
CY7C1367A/GVT71512C18
36/512K
CY7C1366A/GVT71256C36
CY7C1367A/GVT71512C18
CY7C1367A
GVT71512C18
4947a
SRAM controller
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PDF
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CY7C1367A
Abstract: GVT71512C18
Text: CY7C1366A/GVT71256C36 CY7C1367A/71512C18 256K x 36/512K x 18 Pipelined SRAM Features and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous
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Original
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CY7C1366A/GVT71256C36
CY7C1367A/GVT71512C18
36/512K
CY7C1367A
GVT71512C18
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PDF
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CY7C1367A
Abstract: GVT71512C18 CY7C1367A-166AC 6n35
Text: CY7C1366A/GVT71256C36 CY7C1367A/71512C18 256K x 36/512K x 18 Pipelined SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining
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Original
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CY7C1366A/GVT71256C36
CY7C1367A/GVT71512C18
36/512K
CY7C1367A
GVT71512C18
CY7C1367A-166AC
6n35
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PDF
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GVT71256C36
Abstract: GVT71512C18 4h35
Text: GALVANTECH, INC. GVT71256C36/71512C18 256K X 36/512K X 18 SYNCHRONOUS SRAM SYNCHRONOUS BURST SRAM PIPELINED OUTPUT FEATURES • • • • • • • • • • • • • • • • • • Fast access times: 2.5ns, 3.0ns, and 3.5ns Fast clock speed: 225, 200, 166, and 150MHz
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Original
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GVT71256C36/GVT71512C18
36/512K
150MHz
71256C36
71512C18
GVT71256C36
GVT71512C18
4h35
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PDF
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