Untitled
Abstract: No abstract text available
Text: 128K x 36, 3.3V Synchronous IDT71V546 Feature, SRAM with ZBT Burst Counter and Pipelined Outputs Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 128K x 36 memory configuration, pipelined outputs Supports high performance system speed - 133 MHz
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Original
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PDF
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IDT71V546
PackaV546
PK100-1)
71V546S133PF
71V546S117PF
71V546100PF
x4033
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71V546
Abstract: IDT71V546
Text: 128K X 36, 3.3V SYNCHRONOUS SRAM WITH ZBT FEATURE, BURST COUNTER AND PIPELINED OUTPUTS FEATURES: 128K x 36 memory configuration, pipelined outputs Supports high performance system speed - 133 MHz 4.2 ns Clock-to-Data Access ZBTTM Feature - No dead cycles between write and read cycles
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Original
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PDF
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71V546
PK100-1)
71V546S133PF
71V546S117PF
71V546100PF
71V546
IDT71V546
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71V546
Abstract: IDT71V546
Text: 128K x 36, 3.3V Synchronous IDT71V546 Feature, SRAM with ZBT Burst Counter and Pipelined Outputs Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 128K x 36 memory configuration, pipelined outputs Supports high performance system speed - 133 MHz
|
Original
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PDF
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IDT71V546
71V546S133PF
71V546S117PF
71V546100PF
IDT71V546
x4033
71V546
|
71V546
Abstract: IDT71V546
Text: 128K x 36, 3.3V SYNCHRONOUS SRAM WITH ZBTTM FEATURE, BURST COUNTER AND PIPELINED OUTPUTS PRELIMINARY IDT71V546 Integrated Device Technology, Inc. FEATURES: • 128K x 36 memory configuration, pipelined outputs • Supports high performance system speed - 133 MHz
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Original
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PDF
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IDT71V546
71V546
PK100-1)
71V546S133PF
71V546S117PF
71V546100PF
71V546S83PF
71V546
IDT71V546
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Untitled
Abstract: No abstract text available
Text: 128K x 36, 3.3V SYNCHRONOUS SRAM WITH ZBT FEATURE, BURST COUNTER AND PIPELINED OUTPUTS PRELIMINARY IDT71V546 I n te g r a te d D e v iz e T e c h n o lo g y , l i e . FEATURES: • 128K x 36 memory configuration, pipelined outputs • Supports high performance system speed -1 3 3 MHz
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OCR Scan
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PDF
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IDT71V546
2S771
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Untitled
Abstract: No abstract text available
Text: 128K x 36, 3.3V Synchronous IDT71V546 SRAM with ZBT Feature, Burst Counter and Pipelined Outputs i f l l > * * « « * : Features * 128K x 36 memory configuration, pipelined outputs clock cycle, and two cycles later Its associated data cycle occurs, be it
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OCR Scan
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PDF
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IDT71V546
IDT71V546
PK100-1)
71V546S133PF
71V546S117PF
117MHz
71V546100PF
x4033
|
Untitled
Abstract: No abstract text available
Text: 128K X 36, 3.3V SYNCHRONOUS SRAM WITH ZBT FEATURE, BURST COUNTER AND PIPELINED OUTPUTS IDT71V546 FEA TU R ES: • 128K x 36 memory configuration, pipelined outputs • Supports high performance system speed -133 MHz 4.2 ns Clock-to-Data Access cycle, and two cycles later Its associated data cycle occurs, be it read or
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OCR Scan
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PDF
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IDT71V546
IDT71V546
71V546
PK100-1
71V546S133PF
71V546S117PF
117MHz
71V546100PF
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