74AVC16836ADGG Search Results
74AVC16836ADGG Price and Stock
Nexperia 74AVC16836ADGG,118Bus XCVR Single 20-CH 3-ST 56-Pin TSSOP T/R |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74AVC16836ADGG,118 | 8,076 | 338 |
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Philips Semiconductors 74AVC16836ADGG |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74AVC16836ADGG | 26 |
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74AVC16836ADGG Datasheets (5)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
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74AVC16836ADGG |
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20 Bit Registered Driver with Inverted Register Enable and Dynamic Controlled Outputs (3-State) | Original | |||
74AVC16836ADGG |
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Register, Single, 18 Channel, Non-Inverting, CMOS, 56-TSSOP | Original | |||
74AVC16836ADGG112 |
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NOW NEXPERIA 74AVC16836ADGG - BU | Original | |||
74AVC16836ADGG,112 |
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20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State) - Description: 1.8/2.5V 20-Bit Registered Driver with Inverted Register Enable (3-State) ; Logic switching levels: CMOS ; Number of pins: 56 ; Output drive capability: Medium ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2 ns; Voltage: Low; Package: SOT364-1 (TSSOP56); Container: Tube | Original | |||
74AVC16836ADGG,118 |
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20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State) - Description: 1.8/2.5V 20-Bit Registered Driver with Inverted Register Enable (3-State) ; Logic switching levels: CMOS ; Number of pins: 56 ; Output drive capability: Medium ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2 ns; Voltage: Low; Package: SOT364-1 (TSSOP56); Container: Reel Pack, SMD, 13" | Original |
74AVC16836ADGG Datasheets Context Search
Catalog Datasheet | MFG & Type | Document Tags | |
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74AVC16836A
Abstract: 74AVC16836ADGG 74AVC16836ADGV CBT16292 PCK2509S PCK2510S PC133 registered reference design
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74AVC16836A 20-bit 74AVC16836A 74AVC16836ADGG 74AVC16836ADGV CBT16292 PCK2509S PCK2510S PC133 registered reference design |