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    74LVC3G04GT Search Results

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    74LVC3G04GT Price and Stock

    Nexperia 74LVC3G04GT,115

    IC INVERTER 3CH 3-INP 8XSON
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    DigiKey 74LVC3G04GT,115 Digi-Reel 4,617 1
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    74LVC3G04GT,115 Cut Tape 4,617 1
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    74LVC3G04GT,115 Reel 5,000
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    Avnet Americas 74LVC3G04GT,115 Reel 6 Weeks 10,000
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    Mouser Electronics 74LVC3G04GT,115
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    Verical 74LVC3G04GT,115 60,000 4,616
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    Newark 74LVC3G04GT,115 Cut Tape 1,480 5
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    Rochester Electronics 74LVC3G04GT,115 110,000 1
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    TTI 74LVC3G04GT,115 Reel 5,000
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    Avnet Silica 74LVC3G04GT,115 8 Weeks 5,000
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    EBV Elektronik 74LVC3G04GT,115 5,000 8 Weeks 5,000
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    Rochester Electronics LLC 74LVC3G04GT,115

    IC INVERTER
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    DigiKey 74LVC3G04GT,115 Bulk 3,771
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    NXP Semiconductors 74LVC3G04GT,115

    Inverter 3-ElementCMOS 8-Pin XSON T/R
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    Verical 74LVC3G04GT,115 85,000 4,616
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    74LVC3G04GT,115 70,000 4,616
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    74LVC3G04GT,115 9,050 4,616
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    74LVC3G04GT,115 5,000 4,616
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    Rochester Electronics 74LVC3G04GT,115 209,050 1
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    74LVC3G04GT Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC3G04GT NXP Semiconductors Triple inverter Original PDF
    74LVC3G04GT,115 NXP Semiconductors 74LVC3G04 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT833-1, XSON-8, Gate Original PDF
    74LVC3G04GT,115 NXP Semiconductors Triple inverter; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" Original PDF
    74LVC3G04GT-G NXP Semiconductors 74LVC3G04GT - Triple inverter Original PDF
    74LVC3G04GT-G NXP Semiconductors Triple inverter Original PDF

    74LVC3G04GT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G04 Triple inverter Rev. 10 — 14 June 2012 Product data sheet 1. General description The 74LVC3G04 provides three inverting buffers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G04 74LVC3G04

    MO-187

    Abstract: 74LVC3G04 74LVC3G04DC 74LVC3G04DP 74LVC3G04GM 74LVC3G04GT JESD22-A114E
    Text: 74LVC3G04 Triple inverter Rev. 05 — 5 October 2007 Product data sheet 1. General description The 74LVC3G04 provides three inverting buffers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G04 74LVC3G04 MO-187 74LVC3G04DC 74LVC3G04DP 74LVC3G04GM 74LVC3G04GT JESD22-A114E

    74LVC3G04

    Abstract: 74LVC3G04DC 74LVC3G04DP 74LVC3G04GM 74LVC3G04GT JESD22-A114E MO-187
    Text: 74LVC3G04 Triple inverter Rev. 07 — 16 June 2008 Product data sheet 1. General description The 74LVC3G04 provides three inverting buffers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G04 74LVC3G04 74LVC3G04DC 74LVC3G04DP 74LVC3G04GM 74LVC3G04GT JESD22-A114E MO-187

    marking code E2 logic gate

    Abstract: SN74LVC3G04DCUR 74AUP3G04 74LVC3G04 NC7NP04 NC7NZ04 NL37WZ04 SN74LVC3G04 "MARKING CODE" 3Y
    Text: SLG74LB3G04 GreenLIBTM TRIPLE INVERTER GATE General Description Features The GreenLIB provides the triple inverter gate. This device is • Pb-Free / RoHS Compliant fully specified for partial-power-down applications using Ioff. • Halogen-Free The Ioff circuitry disables the outputs, preventing damaging


    Original     		PDF SLG74LB3G04 000-0074LB3G04-10 marking code E2 logic gate SN74LVC3G04DCUR 74AUP3G04 74LVC3G04 NC7NP04 NC7NZ04 NL37WZ04 SN74LVC3G04 "MARKING CODE" 3Y

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G04 Triple inverter Rev. 10 — 14 June 2012 Product data sheet 1. General description The 74LVC3G04 provides three inverting buffers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G04 74LVC3G04

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G04 Triple inverter Rev. 11 — 2 April 2013 Product data sheet 1. General description The 74LVC3G04 provides three inverting buffers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G04 74LVC3G04

    SOT-833

    Abstract: No abstract text available
    Text: 74LVC3G04 Triple inverter Rev. 04 — 20 March 2007 Product data sheet 1. General description The 74LVC3G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these


    Original     		PDF 74LVC3G04 74LVC3G04 SOT-833

    74LVC3G04

    Abstract: 74LVC3G04DC 74LVC3G04DP 74LVC3G04GT MO-187
    Text: 74LVC3G04 Triple inverter Rev. 03 — 01 February 2005 Product data sheet 1. General description The 74LVC3G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these


    Original     		PDF 74LVC3G04 74LVC3G04 74LVC3G04DC 74LVC3G04DP 74LVC3G04GT MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G04 Triple inverter Rev. 9 — 23 November 2011 Product data sheet 1. General description The 74LVC3G04 provides three inverting buffers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G04 74LVC3G04

    74LVC3G04

    Abstract: 74LVC3G04DC 74LVC3G04DP 74LVC3G04GM 74LVC3G04GT
    Text: 74LVC3G04 Triple inverter Rev. 8 — 10 November 2010 Product data sheet 1. General description The 74LVC3G04 provides three inverting buffers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G04 74LVC3G04 74LVC3G04DC 74LVC3G04DP 74LVC3G04GM 74LVC3G04GT

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G04 Triple inverter Rev. 06 — 3 March 2008 Product data sheet 1. General description The 74LVC3G04 provides three inverting buffers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G04 74LVC3G04 JESD8B/JESD36