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    74LVC3G07DP Search Results

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    74LVC3G07DP Price and Stock

    Nexperia 74LVC3G07DP,125

    IC BUF NON-INVERT 5.5V 8TSSOP
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    DigiKey 74LVC3G07DP,125 Cut Tape 20,916 1
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    74LVC3G07DP,125 Digi-Reel 20,916 1
    • 1 $0.5
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    74LVC3G07DP,125 Reel 18,000 3,000
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    Avnet Americas 74LVC3G07DP,125 Reel 8 Weeks 6,000
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    Mouser Electronics 74LVC3G07DP,125 5,203
    • 1 $0.45
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    Verical 74LVC3G07DP,125 13,746 1,875
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    74LVC3G07DP,125 3,000 1,875
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    74LVC3G07DP,125 2,500 517
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    74LVC3G07DP,125 2,500 1,875
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    Arrow Electronics 74LVC3G07DP,125 Cut Strips 2,500 8 Weeks 517
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    74LVC3G07DP,125 10 1
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    Newark 74LVC3G07DP,125 Cut Tape 5,118 1
    • 1 $0.631
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    Rochester Electronics 74LVC3G07DP,125 20,228 1
    • 1 $0.1882
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    TTI 74LVC3G07DP,125 Reel 6,000
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    Avnet Asia 74LVC3G07DP,125 6,000 8 Weeks 6,000
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    Avnet Silica 74LVC3G07DP,125 3,000 10 Weeks 3,000
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    EBV Elektronik 74LVC3G07DP,125 10 Weeks 3,000
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    Nexperia 74LVC3G07DP-Q100H

    IC BUF NON-INVERT 5.5V 8TSSOP
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    DigiKey 74LVC3G07DP-Q100H Reel 3,000
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    Avnet Americas 74LVC3G07DP-Q100H Reel 8 Weeks 3,000
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    Mouser Electronics 74LVC3G07DP-Q100H
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    TTI 74LVC3G07DP-Q100H Reel 3,000
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    Avnet Silica 74LVC3G07DP-Q100H 10 Weeks 3,000
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    NXP Semiconductors 74LVC3G07DP

    Triple buffer with open-drain output Buffer, LVC/LCX/Z Series, 3-Func, 1-Input, CMOS, PDSO8
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    ComSIT USA 74LVC3G07DP 5,650
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    Vyrian 74LVC3G07DP 257
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    Win Source Electronics 74LVC3G07DP 57,024
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    Others 74LVC3G07DP

    INSTOCK
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    Chip 1 Exchange 74LVC3G07DP 2,547
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    74LVC3G07DP Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC3G07DP NXP Semiconductors Triple buffer with open-drain output Original PDF
    74LVC3G07DP Philips Semiconductors OP Amp, Triple Buffer with Open-Drain Output, Tape and Reel Original PDF
    74LVC3G07DP,125 NXP Semiconductors 74LVC3G07 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8, 3 MM, PLASTIC, SOT505-2, TSSOP-8, Gate Original PDF
    74LVC3G07DP,125 NXP Semiconductors Triple buffer with open-drain output - Description: Triple Buffer With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: [email protected] ns; Voltage: 1.65 - 5.5; Package: SOT505-2 (TSSOP8); Container: Reel Pack, Reverse, Reverse Original PDF
    74LVC3G07DP-G NXP Semiconductors 74LVC3G07DP - Triple buffer with open-drain output - Description: Triple Buffer With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: [email protected] ns; Voltage: 1.65 - 5.5 Original PDF
    74LVC3G07DP-G NXP Semiconductors Triple buffer with open-drain output - Description: Triple Buffer With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: [email protected] ns; Voltage: 1.65 - 5.5 Original PDF
    74LVC3G07DP-Q100125 NXP Semiconductors BUFFER, LVC/LCX/Z SERIES Original PDF
    74LVC3G07DP-Q100H NXP Semiconductors 74LVC3G07DP-Q100 - 74LVC3G07DP-Q100 - Triple buffer with open-drain output Original PDF
    74LVC3G07DP/S400,1 NXP Semiconductors 74LVC3G07DP/S400 - Triple buffer with open-drain output, SOT505-2 Package, Standard Marking, Reel Pack, Reverse Original PDF

    74LVC3G07DP Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    74LVC3G07

    Abstract: 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 7 — 9 August 2010 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    74LVC3G07 74LVC3G07 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 11 — 9 April 2013 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    74LVC3G07 74LVC3G07 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 8 — 19 October 2011 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    74LVC3G07 74LVC3G07 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 02 — 27 October 2004 Product data sheet 1. General description The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original
    74LVC3G07 74LVC3G07 PDF

    74LVC3G07

    Abstract: 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT JESD22-A114E MO-187
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 06 — 16 June 2008 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    74LVC3G07 74LVC3G07 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT JESD22-A114E MO-187 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 10 — 27 June 2012 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    74LVC3G07 74LVC3G07 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 05 — 19 February 2008 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    74LVC3G07 74LVC3G07 PDF

    74LVC3G07

    Abstract: 74LVC3G07DC 74LVC3G07DP 74LVC3G07GT MO-187
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 03 — 01 February 2005 Product data sheet 1. General description The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original
    74LVC3G07 74LVC3G07 74LVC3G07DC 74LVC3G07DP 74LVC3G07GT MO-187 PDF

    74LVC3G07

    Abstract: 74LVC3G07DC 74LVC3G07DP MO-187 mna591
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 01 — 8 June 2004 Product data sheet 1. General description The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this


    Original
    74LVC3G07 74LVC3G07 74LVC3G07DC 74LVC3G07DP MO-187 mna591 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 9 — 23 November 2011 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    74LVC3G07 74LVC3G07 PDF

    SOT902-1

    Abstract: No abstract text available
    Text: 74LVC3G07 Triple buffer with open-drain output Rev. 04 — 21 May 2007 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.


    Original
    74LVC3G07 74LVC3G07 SOT902-1 PDF

    74LVC3G07

    Abstract: 74LVC3G07DC 74LVC3G07DP NL37WZ07 SN74AUP3G07 SN74LVC3G07 SLG74LB3G07
    Text: SLG74LB3G07 GreenLIBTM TRIPLE BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS General Description The GreenLIB Features provides the triple buffer/driver with open-drain outputs. The output of the device is open-drain and can be connected to other open-drain outputs


    Original
    SLG74LB3G07 000-0074LB3G07-11 74LVC3G07 74LVC3G07DC 74LVC3G07DP NL37WZ07 SN74AUP3G07 SN74LVC3G07 SLG74LB3G07 PDF

    74LVC3G07DP-Q100

    Abstract: No abstract text available
    Text: 74LVC3G07-Q100 Triple buffer with open-drain output Rev. 1 — 29 January 2013 Product data sheet 1. General description The 74LVC3G07-Q100 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain


    Original
    74LVC3G07-Q100 74LVC3G07-Q100 74LVC3G07 74LVC3G07DP-Q100 PDF