Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    80960SX Search Results

    80960SX Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    transistor 778

    Abstract: cpu 80960kx printer controller 80960SX Destiny d5001 D8905
    Text: PRINTERS DESTINY TECHNOLOGY CORPORATION D5001 Page Printer Coprocessor • ■ ■ ■ ■ ■ ■ ■ ■ ■ Optimized For Intel i960 Processor Family 80960Sx, 80960Kx, 80960Jx and 80960Cx Supports Up to 1200 dpi Resolutions Band Processing Requires Less


    Original
    D5001 80960Sx, 80960Kx, 80960Jx 80960Cx) D8905 transistor 778 cpu 80960kx printer controller 80960SX Destiny d5001 PDF

    micro instruction set of I960 hx

    Abstract: 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA Intel i960
    Text: Intel i960® Processors i960® Architecture Family Product Highlights • 32-bit register-based RISC core in all processors ■ Code compatibility across entire product line ■ Broad selection of price and performance levels ■ Ideal for networking and imaging


    Original
    32-bit JT-100 USA/1001/500/IL11444 micro instruction set of I960 hx 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA Intel i960 PDF

    Untitled

    Abstract: No abstract text available
    Text: PCI 9060 December, 1995 PCI Bus Master Interface Chip for VERSION 1.2 Adapters and Embedded Systems Features • • • • • • • • General Description _


    Original
    PCI9060 9060-SIL-ER-P0-1 PDF

    T28F400

    Abstract: intel 28F400bx E28F400BX-B60 interfacing of memory devices with 80286 microprocessor 80286 internal architecture 28F004BX-B 28F004BX-T 28F400BX-B 28F400BX-T E28F400BX-T60
    Text: 4-MBIT 256K X 16 512K X 8 BOOT BLOCK FLASH MEMORY FAMILY 28F400BX-T B 28F004BX-T B Y x8 x16 Input Output Architecture 28F400BX-T 28F400BX-B For High Performance and High Integration 16-bit and 32-bit CPUs Y Very High-Performance Read 60 80 120 ns Maximum Access Time


    Original
    28F400BX-T 28F004BX-T 28F400BX-B 16-bit 32-bit 28F004BX-B 28F400BX-120 28F004BX-120 T28F400 intel 28F400bx E28F400BX-B60 interfacing of memory devices with 80286 microprocessor 80286 internal architecture 28F004BX-B 28F400BX-B E28F400BX-T60 PDF

    i960CA

    Abstract: ka 20885 D 80960 EP80960BB atu-3 FF90FF i960 KA/KB Programmers Reference Manual 80960CF 80960RP IQ80960RP
    Text: Getting Started with the 80960 QUICKval Kit i960 Microprocessor Evaluation Kit Order Number: 632708-005 Revision Revision History Date -001 Original Issue. 12/94 -002 80960Hx and PCI80960DP chapters added. Additional examples for all processors added. 12/95


    Original
    80960Hx PCI80960DP 80960RP, IQ80960RP i960CA ka 20885 D 80960 EP80960BB atu-3 FF90FF i960 KA/KB Programmers Reference Manual 80960CF 80960RP PDF

    TSOT1610GP-YB21

    Abstract: MARS10G el12n 1724-pin STM-64 AU-AIS TSOT1610G 1724P 0AA00 mars10g T-PRO AW23
    Text: Hardware Design Guide April 2005 MARS10G T-Pro and MARS10G TD-Pro TSOT1610GP/GPD SONET/SDH STS-192/STM-64 Overhead Terminator and Path Processor Overview The MARS10G T-Pro and MARS10G TD-Pro are STS-192/STM-64 overhead generators/terminators and path processors, members of the MARS family


    Original
    MARS10G TSOT1610GP/GPD) STS-192/STM-64 0A-301C, TSOT1610GP-YB21 el12n 1724-pin STM-64 AU-AIS TSOT1610G 1724P 0AA00 mars10g T-PRO AW23 PDF

    sun hold RAS 0610

    Abstract: eeprom programmer schematic 24c08 80960KB Programmer Reference manual 270929 KDS crystal 20.000 zilog 4202 IC 24c08 PCI cyclone 3 schematics KDS 4.000 Crystal cpu 80960kx
    Text: i960 Microprocessor User’s Guide for Cyclone and PCI-SDK Evaluation Platforms April 1996 Order Number: 272577-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual


    Original
    Z8536 sun hold RAS 0610 eeprom programmer schematic 24c08 80960KB Programmer Reference manual 270929 KDS crystal 20.000 zilog 4202 IC 24c08 PCI cyclone 3 schematics KDS 4.000 Crystal cpu 80960kx PDF

    v945

    Abstract: 80960SA N80960SB W225 80960SB N80960SA S80960SA S80960SB intel DOC n80960
    Text: 80960SA/SB SPECIFICATION UPDATE Release Date: June, 1997 Order Number: 272850-002 The 80960SA/SB may contain design defects or errors known as errata which may cause the 80960SA/SB to deviate from published specifications. Current characterized errata are documented in this Specification Update.


    Original
    80960SA/SB 80960SA/SB v945 80960SA N80960SB W225 80960SB N80960SA S80960SA S80960SB intel DOC n80960 PDF

    LA3101

    Abstract: PC19060 Igus LD-310 LDL8 pci9080 80960Cx 93C06 I960CX NM93CS06
    Text: PCI 9060 T E C December, 1995 VERSION 1.2 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General D escrip tio n _ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local


    OCR Scan
    PCI9060 Q0007bl xi6-31 Page-100- 0Q007b2 PCI90S0 LA3101 PC19060 Igus LD-310 LDL8 pci9080 80960Cx 93C06 I960CX NM93CS06 PDF

    Untitled

    Abstract: No abstract text available
    Text: intJ. 2-MBIT 128K x 16, 256K x 8 LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY 28F200BL-T/B, 28F002BL-T/B m Low Voltage Operation for Very Low Power Portable Applications — Vcc = 3.0V-3.6 V • Automatic Power Savings Feature — 0.8 mA Typical Ice Active Current in


    OCR Scan
    28F200BL-T/B, 28F002BL-T/B x8/x16 28F200BL-T, 28F200BL-B 16-bit 32-bit 28F002BL-T, 28F002BL-B 16-KB PDF

    Untitled

    Abstract: No abstract text available
    Text: in tj 2-MBIT 128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY 28F200BX-T/B, 28F002BX-T/B x8/x16 Input/Output Architecture — 28F200BX-T, 28F200BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs ■ x8-only Input/Output Architecture


    OCR Scan
    28F200BX-T/B, 28F002BX-T/B x8/x16 28F200BX-T, 28F200BX-B 16-bit 32-bit 28F002BX-T 28F002BX-B 16-KB PDF

    Untitled

    Abstract: No abstract text available
    Text: in te i 1-MBIT 128K X 8 BOOT BLOCK FLASH MEMORY 2 8 F 0 0 1 B X -T /2 8 F 0 0 1 B X -B /2 8 F 0 0 1 B N -T /2 8 F 0 0 1 B N -B • High-Integration Blocked Architecture — One 8 KB Boot Block w/Lock Out — Two 4 KB Parameter Blocks — One 112 KB Main Block


    OCR Scan
    32-Pin 4flSbl75 PDF

    Untitled

    Abstract: No abstract text available
    Text: in te l A28F400BX-T/B 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Automotive x8/x16 Input/Output Architecture — A28F400BX-T, A28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs Optimized High Density Blocked Architecture


    OCR Scan
    A28F400BX-T/B x8/x16 A28F400BX-T, A28F400BX-B 16-bit 32-bit APA28F400BX-T90 APA28F400BX-B90 A28F200BX PDF

    Untitled

    Abstract: No abstract text available
    Text: in tj. 28F400BX-T/B, 28F004BX-T/B 4 MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY • x8/x16 Input/Output Architecture — 28F400BX-T, 28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs ■ Very High-Performance Read


    OCR Scan
    28F400BX-T/B, 28F004BX-T/B x8/x16 28F400BX-T, 28F400BX-B 16-bit 32-bit 28F004BX-T, 28F004BX-B 16-KB PDF

    28F001

    Abstract: intel 28F001BXT
    Text: in t e i, 28F001BX-T/28F001BX-B 1M 128K x 8 CMOS FLASH MEMORY • High Integration Blocked Architecture — One 8KB Boot Block w/Lock Out — Two 4KB Parameter Blocks — One 112KB Main Block ■ 10,000 Erase/Program Cycles Minimum Per Block ■ Simplified Program and Erase


    OCR Scan
    28F001BX-T/28F001BX-B 112KB 32-Lead 28F001BX 28F001 intel 28F001BXT PDF

    3165* intel

    Abstract: 82360SL intel 80386SL twc np 6001 28f200 tsop intel 28f200bx 28F002BX 28F002BX-B 28F002BX-T 28F200BX
    Text: INTEL CORP HEHORY/PLD/ SbE D • 4fl2bl?b 007bBS3 flTb m i T L Z 0M lF K ß ! ilÄ T 0®If!!] in te l 'T W o 'K V ¿ k 28F200BX-T/B, 28F002BX-T/B 2 MBIT (128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY x8/x16 Input/Output Architecture — 28F200BX-T, 28F200BX-B


    OCR Scan
    46Ebl7b QQ7b353 28F200BX-T/B, 28F002BX-T/B x8/x16 28F200BX-T, 28F200BX-B 16-bit 32-bit 28F002BX-T 3165* intel 82360SL intel 80386SL twc np 6001 28f200 tsop intel 28f200bx 28F002BX 28F002BX-B 28F200BX PDF

    Untitled

    Abstract: No abstract text available
    Text: 2-MBIT 128K x 16, 256K x 8 LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY 28F200BL-T/B , 28F 002B L-T/B • SRAM-Compatible Write Interface ■ Low Voltage Operation for Very Low Power Portable Applications — VCc - 3.0V-3.6V ■ Automatic Power Savings Feature


    OCR Scan
    28F200BL-T/B x8/x16 28F200BL-T, 28F200BL-B 16-bit 32-bit 28F002BL-T, 28F002BL-B 16-KB 96-KB PDF

    k 4431

    Abstract: No abstract text available
    Text: in te i 28F200BX-T/B, 28F002BX-T/B 2 MBIT 128K x 16,256K x 8 BOOT BLOCK FLASH MEMORY FAMILY x6/x16 Input/Output Architecture — 28F200BX-T, 28F200BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs Very High-Performance Read — 60/80 ns Maximum Access Time


    OCR Scan
    28F200BX-T/B, 28F002BX-T/B x6/x16 28F200BX-T, 28F200BX-B 16-bit 32-bit 28F002BX-T 28F002BX-B E28F002BX-60 k 4431 PDF

    rsm 2814

    Abstract: No abstract text available
    Text: 1.0 Product Description - The Bt8209 and Bt8210 Switched Multimegabit Data Service SMDS Control and Reassembly Formatters (SCARF) provide a single-access SMDS service ter­ mination for connectionless data, “datagram,” transfer according to Bellcore TRTSV-000772 and TR-TSV-000773. Customer Premise Equipment (CPE) and


    OCR Scan
    Bt8209 Bt8210 TRTSV-000772 TR-TSV-000773. TR-TSV-000774 TR-TSV-000775 0x2000-0x3FFF) L8210 rsm 2814 PDF

    Untitled

    Abstract: No abstract text available
    Text: [» [iS C m Y O !* ] In te l A28F200BX-T/B 2-MBIT 128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY Automotive x8/x16 Input/Output Architecture — A28F200BX-T, A28F200BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs Optimized High Density Blocked


    OCR Scan
    A28F200BX-T/B x8/x16 A28F200BX-T, A28F200BX-B 16-bit 32-bit APA28F200BX-T90 APA28F200BX-B90 A28F400BX PDF

    Untitled

    Abstract: No abstract text available
    Text: PCI 9060SD MAY 1996 VERSION 0.6 PCI Bus Master Interface Chip for Master and Slave Adapters General Description _ Featu res_ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and slave adapters


    OCR Scan
    9060SD PCI9060SD 9060SD. hflSS14^ PDF

    Untitled

    Abstract: No abstract text available
    Text: PCI 9060 * E PCI Bus Master Interface Chip for Adapters and Embedded Systems December, 1995 VERSION 1.2 Features General Description_ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local bus


    OCR Scan
    PCI9060 100Version 00Q07 PCI9060 PDF

    29050

    Abstract: No abstract text available
    Text: Ä m K l i 0M 1F® I^Ö M 1Ä ¥D ® M in te l A28F200BX-T/B 2-MBIT 128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY Automotive a x8/x16 Input/Output Architecture • ■ ■ ■ ■ ■ — A28F200BX-T, A28F200BX-B — For High Performance and High


    OCR Scan
    A28F200BX-T/B x8/x16 A28F200BX-T, A28F200BX-B 16-bit 32-bit A28F200BX-T/B APA28F200BX-T90 APA28F200BX-B90 29050 PDF

    Untitled

    Abstract: No abstract text available
    Text: Ä E W Ä I M I I O G M f ô K iû Â î r O O M in te i A28F400BX-T/B 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Automotive x8/x16 Input/Output Architecture — A28F400BX-T, A28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs


    OCR Scan
    A28F400BX-T/B x8/x16 A28F400BX-T, A28F400BX-B 16-bit 32-bit A28F400BX-T/B APA28F400BX-T90 APA28F400BX-B90 PDF