CY23FP12
Abstract: CY23FP12-002 CY3672
Text: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed Configurations • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • •
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CY23FP12-002
200-MHz
10-MHz
28-pin
CY23FP12-002
CY23FP12
CY3672
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CY23FP12
Abstract: No abstract text available
Text: CY23FP12-002 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed Configuration ■ Fully Field-Programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration
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CY23FP12-002
CY23FP12-002
CY23FP12.
CY23FP12
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CY23FP12
Abstract: No abstract text available
Text: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Functional Description Features • Fully field-programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz operating range
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CY23FP12
28-pin
CY23FP12
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CY23FP12
Abstract: No abstract text available
Text: CY23FP12 200 MHz Field Programmable Zero Delay Buffer 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable ❐ Input and output dividers ❐ Inverting/non-inverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration
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CY23FP12
28-pin
CY23FP1imited
CY23FP12
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*OC002
Abstract: CY23FP12
Text: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed configuration ■ Fully field-programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration
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CY23FP12-002
200-MHz
CY23FP12-002
CY23FP12.
*OC002
CY23FP12
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CY23FP12
Abstract: CY23FP12OC CY3672 PS11011
Text: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs — Phase-locked loop PLL or fanout buffer configuration • 10-MHz to 200-MHz operating range
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CY23FP12
200-MHz
10-MHz
28-pin
CY23FP12
CY23FP12OC
CY3672
PS11011
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CY23FP12
Abstract: *OC002 CY23FP12-002 CY3672
Text: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed Configurations • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • •
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CY23FP12-002
200-MHz
10-MHz
28-pin
CY23FP12-002
CY23FP12
*OC002
CY3672
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CY23FP12
Abstract: CY23FP12OC CY3672
Text: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs • • • • • • • • • • • • • — Phase-locked loop PLL or fanout buffer configuration
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CY23FP12
200-MHz
10-MHz
28-pin
CY23FP12
CY23FP12OC
CY3672
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CY23FP12
Abstract: CY23FP12OXC CY3692
Text: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz operating range
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CY23FP12
CY23FP12
CY23FP12OXC
CY3692
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CY23FP12
Abstract: CY23FP12OC CY3672
Text: CY23FP12 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully field-programmable — Input and output dividers — Inverting/noninverting outputs — Phase-locked loop PLL or fanout buffer configuration • 10-MHz to 200-MHz operating range
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CY23FP12
200-MHz
10-MHz
28-pin
CY23FP12
CY23FP12OC
CY3672
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CY23FP12
Abstract: CY23FP12-002 CY3692 CY23FP120
Text: CY23FP12-002 200-MHz Field Programmable Zero Delay Buffer Features Functional Description • Pre-programmed configuration ■ Fully field-programmable ❐ Input and output dividers ❐ Inverting/non inverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration
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Original
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PDF
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CY23FP12-002
200-MHz
CY23FP12-002
CY23FP12.
CY23FP12
CY3692
CY23FP120
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CY23FP12
Abstract: CY23FP12OXC CY3692 ADP006
Text: CY23FP12 200 MHz Field Programmable Zero Delay Buffer Features Functional Description • Fully Field-Programmable ❐ Input and output dividers ❐ Inverting/noninverting outputs ❐ Phase-locked loop PLL or fanout buffer configuration ■ 10 MHz to 200 MHz Operating Range
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CY23FP12
28-pin
CY23FP12
CY23FP12OXC
CY3692
ADP006
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