Untitled
Abstract: No abstract text available
Text: MC100EP16F 3.3V / 5VĄECL Differential Receiver/Driver With Reduced Output Swing The MC100EP16F is a differential receiver/driver. The device is functionally equivalent to the EP16 device with higher performance capabilities. With reduced output swings, rise/fall transition times are
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MC100EP16F
EP16F
r14525
MC10EP16F/D
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Untitled
Abstract: No abstract text available
Text: MC100LVEP210 2.5V / 3.3VĄ1:5 Dual Differential ECL/PECL/HSTL Clock Driver The MC100LVEP210 is a low skew 1–to–5 dual differential driver, designed with clock distribution in mind. The ECL/PECL input signals can be either differential or single–ended if the VBB output is used. The
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MC100LVEP210
EP210
LVEP210
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motorola HEP cross reference
Abstract: EPT 4045 KPT23 motorola HEP 320 cross reference vef 202 manual KEP52 MC10EP016 HEP 801 hep51 HEP64
Text: BR1513/D Rev. 2, Apr-2001 ECLinPS Plus Device Data ECLinPS Plus Device Data Advanced ECL in Picoseconds BR1513/D Rev. 2, Apr–2001 SCILLC, 2001 Previous Edition 2000 “All Rights Reserved” ECLinPS, ECLinPS Lite, and ECLinPS Plus are trademarks of Semiconductor Components Industries, LLC.
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BR1513/D
Apr-2001
r14525
DLD601
motorola HEP cross reference
EPT 4045
KPT23
motorola HEP 320 cross reference
vef 202 manual
KEP52
MC10EP016
HEP 801
hep51
HEP64
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LVEP210
Abstract: MC100 MC100EP210 MC100LVEP210 MC100LVEP210FA MC100LVEP210FAR2
Text: MC100LVEP210 2.5V / 3.3VĄ1:5 Dual Differential ECL/PECL/HSTL Clock Driver The MC100LVEP210 is a low skew 1–to–5 dual differential driver, designed with clock distribution in mind. The ECL/PECL input signals can be either differential or single–ended if the VBB output is used. The
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MC100LVEP210
MC100LVEP210
EP210
LVEP210
r14525
MC100LVEP210/D
MC100
MC100EP210
MC100LVEP210FA
MC100LVEP210FAR2
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LVEP111
Abstract: MC100LVEP111FA MC100LVEP111FAR2 MC100 MC100LVEP111
Text: MC100LVEP111 2.5V / 3.3VĄ1:10 Differential ECL/PECL/HSTL Clock Driver The MC100LVEP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or
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MC100LVEP111
MC100LVEP111
LVEP111
r14525
MC100LVEP111/D
MC100LVEP111FA
MC100LVEP111FAR2
MC100
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MC100LVEP111FAR2
Abstract: MC100LVEP111 LVEP111
Text: MC100LVEP111 2.5V / 3.3VĄ1:10 Differential ECL/PECL/HSTL Clock Driver The MC100LVEP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or
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MC100LVEP111
LVEP111
r14525
MC100LVEP111/D
MC100LVEP111FAR2
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Untitled
Abstract: No abstract text available
Text: MC100LVEP210 2.5V / 3.3VĄ1:5 Dual Differential ECL/PECL/HSTL Clock Driver The MC100LVEP210 is a low skew 1–to–5 dual differential driver, designed with clock distribution in mind. The ECL/PECL input signals can be either differential or single–ended if the VBB output is used. The
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MC100LVEP210
EP210
LVEP210
r14525
MC100LVEP210/D
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LVEP111
Abstract: MC100LVEP111 MC100LVEP111FA MC100LVEP111FAR2 MC100 MC100EP111
Text: MC100LVEP111 2.5V / 3.3VĄ1:10 Differential ECL/PECL/HSTL Clock Driver The MC100LVEP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or
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MC100LVEP111
MC100LVEP111
LVEP111
r14525
MC100LVEP111/D
MC100LVEP111FA
MC100LVEP111FAR2
MC100
MC100EP111
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MC100EP809FAR2
Abstract: EP809 MC100EP809 MC100EP809FA
Text: MC100EP809 Product Preview 3.3VĄ1:9 Differential HSTL/PECL in, HSTL out Clock Driver with LVTTL Clock Select and Enable http://onsemi.com The MC100EP809 is a low skew 1–to–9 differential bus clock driver, designed with clock distribution in mind, accepting two clock sources into
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MC100EP809
r14525
MC100EP809/D
MC100EP809FAR2
EP809
MC100EP809FA
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marking code 3275
Abstract: KEP60 MC100EP16F MC100EP16FD MC100EP16FDR2 MC100EP16FDT
Text: MC100EP16F 3.3V / 5VĄECL Differential Receiver/Driver With Reduced Output Swing The MC100EP16F is a differential receiver/driver. The device is functionally equivalent to the EP16 device with higher performance capabilities. With reduced output swings, rise/fall transition times are
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MC100EP16F
MC100EP16F
EP16F
r14525
MC10EP16F/D
marking code 3275
KEP60
MC100EP16FD
MC100EP16FDR2
MC100EP16FDT
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EP809
Abstract: MC100EP809 MC100EP809FA MC100EP809FAR2 MC100 SY89809L
Text: MC100EP809 Product Preview 3.3VĄ1:9 Differential HSTL/PECL in, HSTL out Clock Driver with LVTTL Clock Select and Enable http://onsemi.com The MC100EP809 is a low skew 1–to–9 differential bus clock driver, designed with clock distribution in mind, accepting two clock sources into
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MC100EP809
MC100EP809
r14525
MC100EP809/D
EP809
MC100EP809FA
MC100EP809FAR2
MC100
SY89809L
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LVEP111
Abstract: MC100LVEP111 MC100LVEP111FA MC100LVEP111FAR2 MC100 MC100EP111 AND8033 TQFP 80 socket
Text: MC100LVEP111 2.5V / 3.3VĄ1:10 Differential ECL/PECL/HSTL Clock Driver The MC100LVEP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or
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MC100LVEP111
MC100LVEP111
LVEP111
r14525
MC100LVEP111/D
MC100LVEP111FA
MC100LVEP111FAR2
MC100
MC100EP111
AND8033
TQFP 80 socket
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