LQFP 128 pin Socket
Abstract: lqfp 7x7 tray
Text: MC100LVE164 3.3V ECL 16:1 Multiplexer The MC100LVE164 is a 16:1 multiplexer with a differential output. The select inputs SEL0, 1, 2, 3 control which one of the sixteen data inputs (A0 − A15) is propragated to the output. The device is functionally equivalent to the MC100E164 except it operates from a 3.3 V supply. The
|
Original
|
MC100LVE164
MC100E164
32-lead
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
LQFP 128 pin Socket
lqfp 7x7 tray
|
PDF
|
MC100EP809FAR2
Abstract: EP809 MC100EP809 MC100EP809FA
Text: MC100EP809 3.3V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable The MC100EP809 is a low skew 1−to−9 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The part is designed for use in low voltage
|
Original
|
MC100EP809
MC100EP809
MC100EP809FAR2
EP809
MC100EP809FA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC100EL59 5V ECL Triple 2:1 Multiplexer The MC100EL59 is a triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device useful for both data path and random
|
Original
|
MC100EL59
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
AN1568
|
PDF
|
L3N1
Abstract: bt 2025 bh
Text: ASC 35530 Contents Page Section Title 3 1. Introduction 3 3 3 3 3 4 4 4 2. Functional Description Analog Input Multiplexer Analog Input Gain Analog Output Attenuation Output Mute Digital I/O Port Valid Data Indicator Automatic Sampling Rate Detection Other Sampling Rates
|
OCR Scan
|
H330n
L3N1
bt 2025 bh
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC100LVEL59 3.3V ECL Triple 2:1 Multiplexer The MC100LVEL59 is a 3.3 V triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device
|
Original
|
MC100LVEL59
100LVEL59
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC10E157, MC100E157 5 V ECL Quad 2:1 Multiplexer The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select SEL inputs. The individual select control makes the devices well suited for random logic designs.
|
Original
|
MC10E157,
MC100E157
MC10E/100E157
MC10E157FN
PLCC-28
AND8020
AN1404
AN1405
AN1406
AN1503
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB6L56 2.5V / 3.3V Dual 2:1 Differential Clock / Data Multiplexer with LVPECL Outputs http://onsemi.com Multi−Level Inputs w/ Internal Termination The NB6L56 is a high performance Dual 2−to−1 Differential Clock or Data multiplexer. The differential inputs incorporate internal 50 W
|
Original
|
NB6L56
NB6L56
NB6L56/D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB6L56 2.5V / 3.3V Dual 2:1 Differential Clock / Data Multiplexer with LVPECL Outputs http://onsemi.com Multi−Level Inputs w/ Internal Termination The NB6L56 is a high performance Dual 2−to−1 Differential Clock or Data multiplexer. The differential inputs incorporate internal 50 W
|
Original
|
NB6L56
NB6L56/D
|
PDF
|
AND8020
Abstract: MC100E164 MC100LVE164 MC100LVE164FA MC100LVE164FAR2
Text: MC100LVE164 3.3VĄECL 16:1 Multiplexer The MC100LVE164 is a 16:1 multiplexer with a differential output. The select inputs SEL0, 1, 2, 3 control which one of the sixteen data inputs (A0 – A15) is propragated to the output. The device is functionally equivalent to the MC100E164 except it operates from a 3.3 V supply. The
|
Original
|
MC100LVE164
MC100LVE164
MC100E164
MC100LVE
r14525
MC100LVE164/D
AND8020
MC100LVE164FA
MC100LVE164FAR2
|
PDF
|
tqfp 7x7 tray
Abstract: AND8020 MC100E164 MC100LVE164 MC100LVE164FA MC100LVE164FAR2
Text: MC100LVE164 3.3VĄECL 16:1 Multiplexer The MC100LVE164 is a 16:1 multiplexer with a differential output. The select inputs SEL0, 1, 2, 3 control which one of the sixteen data inputs (A0 – A15) is propragated to the output. The device is functionally equivalent to the MC100E164 except it operates from a 3.3 V supply. The
|
Original
|
MC100LVE164
MC100LVE164
MC100E164
MC100LVE
r14525
MC100LVE164/D
tqfp 7x7 tray
AND8020
MC100LVE164FA
MC100LVE164FAR2
|
PDF
|
QFN-32 footprint
Abstract: PRBS-23 NB6L572 QFN32 PRBS23 jedec package QFN-32 FOOTPRINT 488AM
Text: NB6LQ572 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination The NB6LQ572 is a high performance differential 4:1 Clock/Data input multiplexer and a 1:2 LVPECL Clock / Data fanout buffer that
|
Original
|
NB6LQ572
NB6LQ572
NB6L572,
NB6LQ572.
NB6LQ572/D
QFN-32 footprint
PRBS-23
NB6L572
QFN32
PRBS23
jedec package QFN-32 FOOTPRINT
488AM
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB6LQ572 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination The NB6LQ572 is a high performance differential 4:1 Clock/Data input multiplexer and a 1:2 LVPECL Clock / Data fanout buffer that
|
Original
|
NB6LQ572
NB6LQ572
NB6L572,
NB6LQ572.
NB6LQ572/D
|
PDF
|
PRBS23
Abstract: QFN32 NB6L572M
Text: NB6L572M 2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator Multi−Level Inputs w/ Internal Termination http://onsemi.com Description The NB6L572M is a high performance differential 4:1 Clock / Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that
|
Original
|
NB6L572M
NB6L572M
NB6L572M/D
PRBS23
QFN32
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB6L572M 2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator Multi−Level Inputs w/ Internal Termination http://onsemi.com Description The NB6L572M is a high performance differential 4:1 Clock / Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that
|
Original
|
NB6L572M
NB6L572M
NB6L572M/D
|
PDF
|
|
QFN-32 footprint
Abstract: 32 pins qfn 5x5 footprint E5052A PRBS23 QFN32
Text: NB7LQ572 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination The NB7LQ572 is a high performance differential 4:1 Clock/Data input multiplexer and a 1:2 LVPECL Clock / Data fanout buffer that
|
Original
|
NB7LQ572
NB7LQ572
NB7L572,
NB7LQ572.
NB7LQ572/D
QFN-32 footprint
32 pins qfn 5x5 footprint
E5052A
PRBS23
QFN32
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB7LQ572 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination The NB7LQ572 is a high performance differential 4:1 Clock/Data input multiplexer and a 1:2 LVPECL Clock / Data fanout buffer that
|
Original
|
NB7LQ572
NB7LQ572
NB7L572,
NB7LQ572.
NB7LQ572/D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB7V585M 1.8V / 2.5V Differential 2:1 Mux Input to 1:6 CML Clock/Data Fanout Buffer/Translator Multi−Level Inputs w/ Internal Termination http://onsemi.com Description The NB7V585M is a differential 1−to−6 CML clock/data distribution chip featuring a 2:1 Clock/Data input multiplexer with an
|
Original
|
NB7V585M
NB7V585M
NB7V585M/D
|
PDF
|
LVE164
Abstract: MC100E164 MC100LVE164
Text: MC100LVE164 3.3V ECL 16:1 Multiplexer The MC100LVE164 is a 16:1 multiplexer with a differential output. The select inputs SEL0, 1, 2, 3 control which one of the sixteen data inputs (A0 − A15) is propragated to the output. The device is functionally equivalent to the MC100E164 except it operates from a
|
Original
|
MC100LVE164
MC100LVE164
MC100E164
32-lead
MC100LVE64/D
LVE164
|
PDF
|
Untitled
Abstract: No abstract text available
Text: KIT ATION EVALU E L B AVAILA 19-2727; Rev 2; 6/04 1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and Equalization Features The MAX3786 is an AC-coupled, serial-ATA SATA compatible, 1.5Gbps multiplexer/buffer (mux/buffer) IC that provides the capability to switch a single serial
|
Original
|
MAX3786
50psP-P
T2855-6.
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB7V585M 1.8V / 2.5V Differential 2:1 Mux Input to 1:6 CML Clock/Data Fanout Buffer/Translator Multi−Level Inputs w/ Internal Termination http://onsemi.com Description The NB7V585M is a differential 1−to−6 CML clock/data distribution chip featuring a 2:1 Clock/Data input multiplexer with an
|
Original
|
NB7V585M
NB7V585M/D
|
PDF
|
QFN-32 footprint
Abstract: 32 pins qfn 5x5 footprint marking dj2 QFN-32 NB6VQ572MMNG PRBS23 QFN32 NB7V572M
Text: NB6VQ572M 1.8V / 2.5V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM Description The NB6VQ572M is a high performance differential 4:1 Clock / Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that
|
Original
|
NB6VQ572M
NB6VQ572M
NB7V572M,
NB6VQ572M/D
QFN-32 footprint
32 pins qfn 5x5 footprint
marking dj2
QFN-32
NB6VQ572MMNG
PRBS23
QFN32
NB7V572M
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NB6VQ572M 1.8V / 2.5V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM Description The NB6VQ572M is a high performance differential 4:1 Clock / Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that
|
Original
|
NB6VQ572M
NB6VQ572M
NB7V572M,
NB6VQ572M/D
|
PDF
|
MAX3786UTJ
Abstract: T2055-2 MAX3786 diagram fr 310
Text: KIT ATION EVALU E L B AVAILA 19-2727; Rev 2; 6/04 1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and Equalization Features The MAX3786 is an AC-coupled, serial-ATA SATA compatible, 1.5Gbps multiplexer/buffer (mux/buffer) IC that provides the capability to switch a single serial
|
Original
|
MAX3786
50psP-P
T2855-6.
MAX3786UTJ
T2055-2
diagram fr 310
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC100LVE164 3.3V ECL 16:1 Multiplexer The MC100LVE164 is a 16:1 multiplexer with a differential output. The select inputs SEL0, 1, 2, 3 control which one of the sixteen data inputs (A0 − A15) is propragated to the output. The device is functionally equivalent to the MC100E164 except it operates from a
|
Original
|
MC100LVE164
MC100LVE164
MC100E164
MC100LVE64/D
|
PDF
|