M8 A02
Abstract: 8X13
Text: W9812G2IB 1M x 4 BANKS × 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES. 3
|
Original
|
W9812G2IB
32BITS
M8 A02
8X13
|
PDF
|
W9864G2IH-6I
Abstract: w9864g2ih6i W9864G2IH6
Text: W9864G2IH 512K x 4 BANKS × 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3
|
Original
|
W9864G2IH
32BITS
W9864G2IH-6I
w9864g2ih6i
W9864G2IH6
|
PDF
|
CKE 2009
Abstract: W9864G2IH W9864G2IH-6 W9864G2iH-6I
Text: W9864G2IH 512K X 4 BANKS X 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3
|
Original
|
W9864G2IH
32BITS
CKE 2009
W9864G2IH
W9864G2IH-6
W9864G2iH-6I
|
PDF
|
w9812g2ib-6i
Abstract: W9812G2IB
Text: W9812G2IB 1M x 4 BANKS × 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES. 3
|
Original
|
W9812G2IB
32BITS
w9812g2ib-6i
|
PDF
|
W9812G2IH-6
Abstract: W9812G2IH-6C W9812G2IH6I
Text: W9812G2IH 1M x 4 BANKS × 32BIT SDRAM Table of Contents1 GENERAL DESCRIPTION . 3 2 FEATURES. 3
|
Original
|
W9812G2IH
32BIT
W9812G2IH-6
W9812G2IH-6C
W9812G2IH6I
|
PDF
|
h5tq1g83bfr
Abstract: HMT151R7BFR8C-G7 HMT151R7BFR4C H5TQ1G83BF
Text: 240pin DDR3 SDRAM Registered DIMM DDR3 SDRAM Registered DIMM Based on 1Gb B-die HMT112R7BFR8C HMT125R7BFR8C HMT125R7BFR4C HMT151R7BFR8C HMT151R7BFR4C *Hynix Semiconductor reserves the right to change products or specifications without notice Rev. 1.0 / Dec. 2009
|
Original
|
240pin
HMT112R7BFR8C
HMT125R7BFR8C
HMT125R7BFR4C
HMT151R7BFR8C
HMT151R7BFR4C
512Mx72
010mm
h5tq1g83bfr
HMT151R7BFR8C-G7
HMT151R7BFR4C
H5TQ1G83BF
|
PDF
|
DDR3L-1333
Abstract: No abstract text available
Text: 240pin DDR3L SDRAM Registered DIMM DDR3L SDRAM Registered DIMM Based on 1Gb T-die HMT112R7TFR8A HMT125R7TFR8A HMT125R7TFR4A HMT151R7TFR8A HMT151R7TFR4A *Hynix Semiconductor reserves the right to change products or specifications without notice Rev. 0.1 / Dec. 2009
|
Original
|
240pin
HMT112R7TFR8A
HMT125R7TFR8A
HMT125R7TFR4A
HMT151R7TFR8A
HMT151R7TFR4A
512Mx72
010mm
DDR3L-1333
|
PDF
|
8X13
Abstract: No abstract text available
Text: W9864G2IB 512K x 4 BANKS × 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES. 3
|
Original
|
W9864G2IB
32BITS
8X13
|
PDF
|
Untitled
Abstract: No abstract text available
Text: W9816G6IB 512K x 2 BANKS × 16 BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3
|
Original
|
W9816G6IB
|
PDF
|
Untitled
Abstract: No abstract text available
Text: W9864G6IH 1M x 4BANKS × 16BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3
|
Original
|
W9864G6IH
16BITS
|
PDF
|
cke 2009
Abstract: W9812G2IH-6 W9812G2IH-6C W9812G2IH
Text: W9812G2IH 1M x 4 BANKS × 32BIT SDRAM Table of Contents1 GENERAL DESCRIPTION . 3 2 FEATURES. 3
|
Original
|
W9812G2IH
32BIT
cke 2009
W9812G2IH-6
W9812G2IH-6C
W9812G2IH
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 240pin DDR3 SDRAM Registered DIMM DDR3L SDRAM Registered DIMM Based on 2Gb A-die HMT325R7AFR8A HMT351R7AFR8A HMT351R7AFR4A HMT31GR7AFR8A HMT31GR7AFR4A HMT42GR7AMR4A *Hynix Semiconductor reserves the right to change products or specifications without notice.
|
Original
|
240pin
HMT325R7AFR8A
HMT351R7AFR8A
HMT351R7AFR4A
HMT31GR7AFR8A
HMT31GR7AFR4A
HMT42GR7AMR4A
010mm
2Gx72
HMT42GR7AMR4A
|
PDF
|
HMT112R7BFR8A-G7
Abstract: DDR3 RDIMM
Text: 240pin DDR3L SDRAM Registered DIMM DDR3L SDRAM Registered DIMM Based on 1Gb B-die HMT112R7BFR8A HMT125R7BFR8A HMT125R7BFR4A HMT151R7BFR8A HMT151R7BFR4A *Hynix Semiconductor reserves the right to change products or specifications without notice Rev. 0.1 / Nov. 2009
|
Original
|
240pin
HMT112R7BFR8A
HMT125R7BFR8A
HMT125R7BFR4A
HMT151R7BFR8A
HMT151R7BFR4A
512Mx72
010mm
HMT112R7BFR8A-G7
DDR3 RDIMM
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 240pin DDR3 SDRAM Registered DIMM DDR3 SDRAM Registered DIMM Based on 1Gb T-die HMT112R7TFR8C HMT125R7TFR8C HMT125R7TFR4C HMT151R7TFR8C HMT151R7TFR4C *Hynix Semiconductor reserves the right to change products or specifications without notice Rev. 0.1 / Dec. 2009
|
Original
|
240pin
HMT112R7TFR8C
HMT125R7TFR8C
HMT125R7TFR4C
HMT151R7TFR8C
HMT151R7TFR4C
512Mx72
010mm
|
PDF
|
|
|
W9825G6EH75I
Abstract: No abstract text available
Text: W9825G6EH 4 M x 4 BANKS × 16 BITS SDRAM Table of Contents1. GENERAL DESCRIPTION . 3 2. FEATURES . 3
|
Original
|
W9825G6EH
W9825G6EH75I
|
PDF
|
CKE 2009
Abstract: W9825G2DB W9825G2DB-6
Text: W9825G2DB 2M x 4 BANKS × 32BITS SDRAM Table of Contents1. GENERAL DESCRIPTION. 3 2. FEATURES . 3
|
Original
|
W9825G2DB
32BITS
CKE 2009
W9825G2DB
W9825G2DB-6
|
PDF
|
0.65mm pitch BGA
Abstract: M52S16161A M52S16161A-10TG M52S16161A-8BG M52S16161A-8TG EsmtM52S16161A
Text: ESMT M52S16161A Mobile SDRAM 512K x 16Bit x 2Banks Mobile Synchronous DRAM FEATURES z z z z z z z z z z z GENERAL DESCRIPTION 2.5V power supply LVCMOS compatible with multiplexed address Dual banks operation MRS cycle with address key programs CAS Latency 2 & 3
|
Original
|
M52S16161A
16Bit
M52S16161A
0.65mm pitch BGA
M52S16161A-10TG
M52S16161A-8BG
M52S16161A-8TG
EsmtM52S16161A
|
PDF
|
M12L16161A-7TG
Abstract: M12L16161A M12L16161A-5TG M12L16161
Text: ESMT M12L16161A SDRAM 512K x 16Bit x 2Banks Synchronous DRAM FEATURES z z z z z z z z z GENERAL DESCRIPTION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with address key programs CAS Latency 2 & 3
|
Original
|
M12L16161A
16Bit
M12L16161A
M12L16161A-7TG
M12L16161A-5TG
M12L16161
|
PDF
|
M52D16161A
Abstract: M52D16161A-10BG M52D16161A-10TG cke 2009 amp
Text: ESMT M52D16161A Mobile SDRAM 512K x 16Bit x 2Banks Mobile Synchronous DRAM FEATURES z z z z z z z z z z z GENERAL DESCRIPTION The M52D16161A is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with high performance CMOS technology.
|
Original
|
M52D16161A
16Bit
M52D16161A
M52D16161A-10BG
M52D16161A-10TG
cke 2009 amp
|
PDF
|
M12S64322A
Abstract: M12S64322A-6BG M12S64322A-6TG M12S64322A-7TG
Text: ESMT M12S64322A SDRAM 512K x 32 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y ORDERING INFORMATION JEDEC standard 2.5V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3
|
Original
|
M12S64322A
M12S64322A-6TG
166MHz
M12S64322A-7TG
143MHz
M12S64322A-6BG
90BGA
M12S64322A-7BG
M12S64322A
M12S64322A-6BG
M12S64322A-6TG
M12S64322A-7TG
|
PDF
|
H55S1262EFP
Abstract: No abstract text available
Text: 128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O Specification of 128M 8Mx16bit Mobile SDRAM Memory Cell Array - Organized as 4banks of 2,097,152 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
|
Original
|
128MBit
8Mx16bit)
128Mbit
H55S1262EFP
16bits
200us
|
PDF
|
HY57V561620FTP-H
Abstract: No abstract text available
Text: 256Mb Synchronous DRAM based on 4M x 4Bank x16 I/O 256M 16Mx16bit Hynix SDRAM Memory Memory Cell Array - Organized as 4banks of 4,194,304 x 16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
|
Original
|
256Mb
16Mx16bit)
256Mbit
HY57V561620F
256Mbit
HY57V561620FTP-H
|
PDF
|
M52D16161A
Abstract: No abstract text available
Text: ESMT M52D16161A Operation Temperature Condition -40°C~85°C Mobile SDRAM 512K x 16Bit x 2Banks Mobile Synchronous DRAM FEATURES z z z z z z z z z z z GENERAL DESCRIPTION 1.8V power supply LVCMOS compatible with multiplexed address Dual banks operation MRS cycle with address key programs
|
Original
|
M52D16161A
16Bit
M52D16rate
M52D16161A
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ESMT SDRAM M52S128324A 1M x 32 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y JEDEC standard 2.5V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 1, 2 & 3 - Burst Length ( 1, 2, 4, 8 & full page )
|
Original
|
M52S128324A
M52S128324A-7TG
143MHz
M52S128324A-7BG
143Min
|
PDF
|