CY2DP314OIT Search Results

CY2DP314OIT Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
CY2DP314OIT		Cypress Semiconductor	1 of 2:4 Differential Clock/Data Fanout Buffer		Original	PDF

CY2DP314OIT Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: FastEdge Series CY2DP314 PRELIMINARY 1 of 2:4 Differential Fanout Buffer Features Description The CY2DP314 is a low-skew, low propagation delay 2-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The	Original	PDF	CY2DP314 50-ps 100-ps 500-ps 20-pin CY2DP314
CY2DP314 Abstract: CY2DP314OI CY2DP314OIT CY2DP314OXI CY2DP314OXIT P314 Text: CY2DP314 1:4 Differential Clock/Data Fanout Buffer Features Functional Description • Four ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB) • Hot-swappable/-insertable	Original	PDF	CY2DP314 CY2DP314 CY2DP314OI CY2DP314OIT CY2DP314OXI CY2DP314OXIT P314
p314v Abstract: No abstract text available Text: FastEdge Series CY2DP314 1 of 2:4 Differential Clock/Data Fanout Buffer Features Functional Description • Four ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB)	Original	PDF	CY2DP314 20-pin CY2DP314 p314v
Untitled Abstract: No abstract text available Text: FastEdge Series CY2DP314 PRELIMINARY 1 of 2:4 Differential Fanout Buffer Features Description The CY2DP314 is a low-skew, low propagation delay 2-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The	Original	PDF	CY2DP314 50-ps 100-ps 500-ps 20-pin CY2DP314
CY2DP314 Abstract: CY2DP314OI CY2DP314OIT CY2DP314OXI CY2DP314OXIT P314 Text: CY2DP314 1:4 Differential Clock/Data Fanout Buffer Features Functional Description • Four ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB) • Hot-swappable/-insertable	Original	PDF	CY2DP314 CY2DP314 CY2DP314OI CY2DP314OIT CY2DP314OXI CY2DP314OXIT P314
CY2DP314 Abstract: CY2DP314OI CY2DP314OIT CY2DP314OXI CY2DP314OXIT P314 13VAC Text: CY2DP314 1 of 2:4 Differential Clock/Data Fanout Buffer Features Functional Description • Four ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB) • Hot-swappable/-insertable	Original	PDF	CY2DP314 CY2DP314 CY2DP314OI CY2DP314OIT CY2DP314OXI CY2DP314OXIT P314 13VAC
Untitled Abstract: No abstract text available Text: FastEdge Series CY2DP314 ADVANCE INFORMATION 1 of 2:4 Differential Fanout Buffer Features Description The CY2DP314 is a low-skew, low propagation delay 2-to-4 differential fanout buffer targeted to meet the requirements of high performance clock and data distribution applications. The	Original	PDF	CY2DP314 CY2DP314 100ps 20-Lead