Untitled
Abstract: No abstract text available
Text: ALLEN A V I O N I C S INC A LLEN A V IO N ICS, INC. 5H Z D 'T'Hl'll? 05Q5fl3fl 0000^53 =140 • 80T CASE TYPE 5 TAP ACTIVE DELAY LINE 80G CASE TYPE 1 TAP ACTIVE DELAY LINE SPECIFICATIONS: MECHANIC: • Supply voltage: • Delay tolerances: 5.0 VDC ± 10% ± 2ns or ± 5 %
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05Q5fl3fl
500ppm/Â
010th.
80T575Ã
80T5101
80T5201
80T5251
80T5301
80T5401
80T5501
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0447-002
Abstract: 0447-0100-06 "Digital Delay Line" delay line 400ns 0447-0200-06 "Digital Delay Line" 0447 60NS 70NS A447 "Digital Delay Line" fuse
Text: BEL FUSE INC DflE D | 13S14SB 000QS03 3 | T - H V 13 /defining a degree of excellence DIGITAL DELAY LINE SERIES 0447 AND A447 FIXED DELAY 0447 TECHNICAL INFORMATION A447 TEST CONDITIONS 3.2 Volts 3.0 Nsec 10%-90% 1.2 X Total Delay 4 X Pulse Width I c c l 60.0 Milliamps
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13S14SB
000QS03
Voltag0447-0070-06
100NS
125NS
150NS
175NS
200NS
250NS
300NS
0447-002
0447-0100-06
"Digital Delay Line"
delay line 400ns
0447-0200-06
"Digital Delay Line" 0447
60NS
70NS
A447
"Digital Delay Line" fuse
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0446-0150-01
Abstract: 0446-0150-02 TR 100 40NS 60NS A446 0446-0250-01 0446-0100-01 0446-0200-01
Text: b e l/ defining a degree of excellence LUMPED CONSTANT DELAY LINE SERIES 0446 AND A446 10 TAP TECHNICAL INFORMATION 14 TEST CONDITIONS Pulse W idth Pulse Period Pulse Voltage Rise Time Am bient Temperature A446 0446 3.0 x Total Delay 4 x Pulse Width 1 Vblt
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/o-90%
100PPM/Â
250NS
300NS
400NS
500NS
432-0463/TWX
710-730-5301/FAX
13SmH3
D00074L
0446-0150-01
0446-0150-02
TR 100
40NS
60NS
A446
0446-0250-01
0446-0100-01
0446-0200-01
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250ns TTL Delay
Abstract: No abstract text available
Text: b e l/ defining a degree of excellence DIGITAL DELAY LINE SERIES A447 LOW POWER MODULE 20 MA TYP 5 TAP/FIXED DELAY SPACES @ .2 0 - "t— TECHNICAL INFORMATION TEST CONDITIONS Pulse Vbltage Rise Time Pulse Width Pulse Period Supply Current, Ic c l 3.2 Volts
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/o-90Â
Cu447-0040-08
A447-0200-08
200NS
A447-0050-08
A447-0250-08
250NS
A447-0060-08
A447-0300-08
300NS
250ns TTL Delay
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PECLDL
Abstract: delay line 400ns
Text: lowprofile ECL COMPATIBLE 4-BIT RAMMABLE DELAY LINE # ECL input and output levels # Delays stable and precise # 32-pin DIP package .250 high # Available in delays up to 760ns The Logic Delay Lines are digitally programmable by the presence of either a " 1 " or a " 0 " at each of the programming
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32-pin
760ns
/030180R
PECLDL
delay line 400ns
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Untitled
Abstract: No abstract text available
Text: defining a degree of excellence LUMPED CONSTANT DELAY LINE SERIES 0446 AND A446 10 TAP TECHNICAL INFORMATION TEST CONDITIONS Pulse Width Pulse Period Pulse Voltage Rise Time Ambient Temperature A446 0446 14 3.0 x Total Delay 4 x Pulse Width 1 Vblt 2.0 Nsec 10°/o-90°/o
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/o-90Â
500NS
432-0463/TWX
710-730-5301/FAX
000074b
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0447-0200-10
Abstract: 0447-0050-10 0447-0150-10 0447-0750-10 0447-1000-10 0447-0500-10 0447-0250-10 0447-0300-10 0447-0100-10 0447-1000
Text: BEL FUSE INC DAE D | 13-51423 .DDODSD.a 1 | T- defining a degree of excellence DIGITAL DELAY LINE SERIES 0447 AND A447 10 TAP A447 0447 TECHNICAL INFORMATION -.6 0 MAX. - TEST CONDITIONS 3.2 Volts 3.0 Nsec 10%-90% 1.2 X Total Delay 4 X Pulse Width I c c l 120.0 Milliamps
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100NS
150NS
200NS
250NS
300NS
350NS
400NS
500NS
750NS
1000NS
0447-0200-10
0447-0050-10
0447-0150-10
0447-0750-10
0447-1000-10
0447-0500-10
0447-0250-10
0447-0300-10
0447-0100-10
0447-1000
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Untitled
Abstract: No abstract text available
Text: DALLAS SEMICONDUCTOR CORP OTE D | 2 L 1 4 130 □□□2074 L | T-47-13 Semiconductor 8^? 5Dallas TAP SILICON DELAY LINE FEATURES DS1005 14-Pin DIP DS1005M 8-Pin DIP DS1005S 16-Pin SOIC PIN CONNECTIONS • All silicon time delay Q 1 8 □ Vcc TAP 2 ^ 2 7 □TAP 1
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T-47-13
DS1005
14-Pin
DS1005M
DS1005S
16-Pin
DS1005S
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Untitled
Abstract: No abstract text available
Text: bel/diefining a degree of excellence DIGITAL DELAY LINE SERIES A447 LOW POWER MODULE 20 MA TYP 5 TAP/FIXED DELAY J -~ 3 S I^ C E S 8 .2 0 -^ I 285 MAX. I Vcc 14 o -P ” IN 1 GND7 0 j J .30— £ - . 2 0 —^ 1 0 ^ - TECHNICAL INFORMATION — .80 M AX.- .21 MAX.
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/o-90Â
A447-0300-08
300NS
A447-0070-08
A447-0350-08
350NS
A447-0080-09
A447-0400-08
400NS
A447-0090-08
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SCHS127
Abstract: CD74HCU04 CD74HC04 CD74HCU04E CD74HCU04M HCU04
Text: [ /Title CD74 HCU04 /Subject (High Speed CMOS Logic Hex Inverter CD74HCU04 Data sheet acquired from Harris Semiconductor SCHS127 High Speed CMOS Logic Hex Inverter February 1998 Features Description • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25oC, Fastest Part in QMOS Line
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HCU04
CD74HCU04
SCHS127
CD74HCU04
-55oCcustomer
SCHS127
CD74HC04
CD74HCU04E
CD74HCU04M
HCU04
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3D7424
Abstract: SOIC-14 3D7424D-1
Text: 3D7424 MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE SERIES 3D7424 FEATURES • • • • • • • • • • • PACKAGES Four indep’t programmable lines on a single chip All-silicon CMOS technology Low quiescent current (5mA typical) Leading- and trailing-edge accuracy
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3D7424
3D7424)
400ns
SOIC-14
3D7424D-xx
3D7424
SOIC-14
3D7424D-1
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Untitled
Abstract: No abstract text available
Text: b e l / defining a degree of excellence SMD DIGITAL DELAY LINE 10 TAP SERIES S422 -.8 0 0 M AX.- .100 TYP TECHNICAL INFORMATION - . 1 0 0 TYP D I r TEST CONDITIONS Pulse Voltage Rise Time Pulse Width Pulse Period Supply Current, Ic c l •375 .285 -350 MAX
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/o-90Â
w22-0400-10
400NS
S422-0500-10
500NS
432-0463/TWX
710-730-5301/FAX
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PDF
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Untitled
Abstract: No abstract text available
Text: CD74HCU04 « T tx a s In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SCHS127 High Speed CMOS Logic Hex Inverter February 1998 Features Description • Typical Propagation Delay: 6ns at Vcc = 5V, C l = 15pF, Ta = 25°C, Fastest Part in QMOS Line
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CD74HCU04
CD74HCU04
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Untitled
Abstract: No abstract text available
Text: lowprofile t 2l COMPATIBL 4-BIT PROGRAMMABLE LOGIC DELAY LINE # T 2 l input and output # Delays stable and precise # 32-pin D IP package .250 high capacitive, in d u c tiv e and resistive elem ents. # Available in delays up to 765ns these m odules are b u rn e d -in to Level B o f M l L -S T D -8 83 to ensure
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32-pin
765ns
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2700r
Abstract: XC2064 XC3090 XC4005 XC5200 XC5210 2700R SETUP X1086 Device Reliability report XILINX
Text: TRACE The TRACE Program TRACE Syntax TRACE Files TRACE Options Command Line Examples TRACE Input Details TRACE Output Details TRACE - October 1997 Printed in U.S.A. TRACE R The Xilinx logo shown above is a registered trademark of Xilinx, Inc. XILINX, XACT, XC2064, XC3090, XC4005, XC5210, XC-DS501, FPGA Architect, FPGA Foundry, NeoCAD,
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XC2064,
XC3090,
XC4005,
XC5210,
XC-DS501,
2700r
XC2064
XC3090
XC4005
XC5200
XC5210
2700R SETUP
X1086
Device Reliability report XILINX
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asahi glass delay line
Abstract: crystal 3.58MHZ oscillator H287BSJS-3108HWD crystal 4.43MHZ oscillator ADL-CS346-A02 Asahi Glass 4.43mhz tdk ANS-18267DTY crystal 3.579545MHZ ELB-5F020N
Text: NTSC/PAL Decoder Evaluation Board All adjustments are already done for RV1-RV6 with the 75% color bar signal input. It is recommend not to change the conditions. 1. Applied Parts 2. Adjustment CXA1218S Comp, video to Y/R-Y/B-Y =1:1.4:1 for still video CXA1228S Comp, video to Y/R-Y/B-Y (=1:1:1.27) for moving pictures
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CXA1218S
CXA1228S
ADL-CS346-A02)
433619MHz
ANS-18267DTY)
43MHz
43MHz
asahi glass delay line
crystal 3.58MHZ oscillator
H287BSJS-3108HWD
crystal 4.43MHZ oscillator
ADL-CS346-A02
Asahi Glass
4.43mhz tdk
ANS-18267DTY
crystal 3.579545MHZ
ELB-5F020N
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adm483
Abstract: ADM483AR ADM483AR-REEL ADM483AR-REEL7 ADM483JR MAX483 MS-012AA
Text: 5 V Low Power, Slew-Rate Limited RS-485/RS-422 Transceiver ADM483 EIA RS-485/RS-422-compliant Data rates up to 250 kbps Slew-rate limited for low EMI 100 nA supply current in shutdown mode Low power consumption 120 µA Up to 32 transceivers on one bus Outputs high-z when disabled or powered off
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RS-485/RS-422
ADM483
RS-485/RS-422-compliant
MAX483
RS-485
ADM483JR-REEL7
adm483
ADM483AR
ADM483AR-REEL
ADM483AR-REEL7
ADM483JR
MAX483
MS-012AA
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PDF
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5MHz LC Band Pass Filter
Abstract: MXF5050L tdk cd series capacitors MXF5050 LC Filters TDK filters
Text: Multilayer Chip LC Filters MXF Series FEATURES • Shielded construction to eliminate crosstalk, and suitable for high mounting density. • A completely monolithic structure in which dielectric materials and conductive materials are alternately layered form capacitors. Thereafter the ferrite and
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HC367
Abstract: No abstract text available
Text: [ /Title CD74 HC367 , CD74 HCT36 7, CD74 HC368 , CD74 HCT36 8 /Subject (High Speed CD54/74HC367, CD54/74HCT367, CD54/74HC368, CD74HCT368 Data sheet acquired from Harris Semiconductor SCHS181B November 1997 - Revised April 2002 High Speed CMOS Logic Hex Buffer/Line Driver,
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CD54/74HC367,
CD54/74HCT367,
CD54/74HC368,
CD74HCT368
SCHS181B
HC367
HCT367
HC368
CD74HCT368
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PDF
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ADM3070E
Abstract: ADM3071E ADM3073E ADM3074E ADM3076E
Text: 3.3 V, ±15 kV ESD-Protected, Half- and Full-Duplex, RS-485/RS-422 Transceivers TIA/EIA RS-485/RS-422 compliant ±15 kV ESD protection on RS-485 input/output pins Data rates ADM3070E/ADM3071E/ADM3072E: 250 kbps
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RS-485/RS-422
3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E
RS-485
ADM3070E/ADM3071E/ADM3072E:
ADM3073E/ADM3074E/ADM3075E:
ADM3076E:
ADM3071E/ADM3074E)
14-lead
ADM3070E
ADM3071E
ADM3073E
ADM3074E
ADM3076E
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PDF
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MXF5050
Abstract: MXF3535 LC Filters MXF5050L low-pass filter inductor
Text: Multilayer Chip LC Filters MXF Series TDK multilayer chip LC filters have a completely monolithic structure in which dielectric materials and conductive materials are alternately layered to form capacitors. Then ferrite and conductive materials are alternately layered to form inductors or transformers. These different materials are
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MXF2525
MXF3225
MXF3535
MXF5050
MXF5050
MXF3535
LC Filters
MXF5050L
low-pass filter inductor
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ADM3078EARZ
Abstract: ADM3071EARZ-REEL71 ADM3072E ADM3076EARZ ADM3077EARZ-REEL7
Text: 3.3 V, ±15 kV ESD-Protected, Half- and Full-Duplex, RS-485/RS-422 Transceivers VCC ADM3070E/ ADM3073E/ ADM3076E R RO DE Z D Y The devices have a ⅛ unit load receiver input impedance, which
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RS-485/RS-422
3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
RS-485
ADM3070E/ADM3071E/ADM3072E:
ADM3073E/ADM3074E/ADM3075E:
ADM3076E/ADM3077E/ADM3078E:
ADM3071E/
ADM3074E/ADM3077E)
D06285-0-4/09
ADM3078EARZ
ADM3071EARZ-REEL71
ADM3072E
ADM3076EARZ
ADM3077EARZ-REEL7
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ADM3078EARZ
Abstract: ADM3078 ADM3078EAR ADM3072 ADM3070E ADM3071E ADM3073E ADM3076E adm3072e
Text: 3.3 V, ±15 kV ESD-Protected, Half- and Full-Duplex, RS-485/RS-422 Transceivers TIA/EIA RS-485/RS-422 compliant ±15 kV ESD protection on RS-485 input/output pins Data rates ADM3070E/ADM3071E/ADM3072E: 250 kbps
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RS-485/RS-422
3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
RS-485
ADM3070E/ADM3071E/ADM3072E:
ADM3073E/ADM3074E/ADM3075E:
ADM3076E/ADM3077E/ADM3078E:
ADM3071E/ADM3074E/ADM3077E)
D06285-0-10/06
ADM3078EARZ
ADM3078
ADM3078EAR
ADM3072
ADM3070E
ADM3071E
ADM3073E
ADM3076E
adm3072e
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SMD transistor SF2
Abstract: mcr10ezhf1003 C41-C52 THS7368
Text: THS7368 www.ti.com SBOS497 – DECEMBER 2009 6-Channel Video Amplifier with 3-SD and 3-SD/ED/HD/Full-HD Filters and 6-dB Gain Check for Samples: THS7368 FEATURES DESCRIPTION • Three SDTV Video Amplifiers for CVBS, S-Video, Y’/P’B/P’R, 480i/576i, Y’U’V’, or G'B'R'
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THS7368
SBOS497
THS7368
SMD transistor SF2
mcr10ezhf1003
C41-C52
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