DM54LS491J Search Results

DM54LS491J Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
DM54LS491J		National Semiconductor			Original	PDF

DM54LS491J Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
74ls491 Abstract: No abstract text available Text: July 1989 DM54LS491/74LS491 10-Bit Counter General Description Features/Benefits The ten-bit counter can count up, count down, set, and load 2 LSB’s, 2 MSB’s and 6 middle bits high or low as a group. All operations are synchronous with the clock. SET overrides LOAD, COUNT and HOLD. LOAD overrides COUNT.	OCR Scan	DM54LS491/74LS491 10-Bit 24-pin nputs59 74ls491	PDF
DM74LS491N Abstract: No abstract text available Text: LS491 S National Semiconductor DM54LS491/74LS491 10-Bit Counter General Description Features/Benefits The ten-bit counter can count up, count down, set, and load 2 LSB’s, 2 MSB’s and 6 middle bits high or low as a group. All operations are synchronous with the clock. SET over	OCR Scan	LS491 24-pin DM54LS491/74LS491 10-Bit 10-Blt DM74LS491N	PDF
74ls491 Abstract: 200II Text: LS491 531 National JuM Semiconductor DM54LS491/74LS491 10-Bit Counter General Description Features/Benefits The ten-bit counter can count up, count down, set, and load 2 LSB's, 2 MSB’s and 6 middle bits high or low as a group. All operations are synchronous with the clock. SET over	OCR Scan	DM54LS491/74LS491 10-Bit 24-pin 390ii 74ls491 200II	PDF
02D7 Abstract: No abstract text available Text: O T National æ æ Semiconductor DM54LS491/74LS491 10-Bit Counter General Description Features/Benefits The ten-bit counter can count up, count down, set, and load 2 LSB's, 2 MSB’s and 6 middle bits high or low as a group. All operations are synchronous with the clock. SET over	OCR Scan	DM54LS491/74LS491 10-Bit 24-pin LS491 02D7	PDF
74ls491 Abstract: 74ls491 timing diagram DM74LS491N 8332 prom C1995 DM54LS491 DM54LS491J DM74LS491J J24F N24C Text: DM54LS491 74LS491 10-Bit Counter General Description Features Benefits The ten-bit counter can count up count down set and load 2 LSB’s 2 MSB’s and 6 middle bits high or low as a group All operations are synchronous with the clock SET overrides LOAD COUNT and HOLD LOAD overrides COUNT	Original	DM54LS491 74LS491 10-Bit 24-pin 74ls491 timing diagram DM74LS491N 8332 prom C1995 DM54LS491J DM74LS491J J24F N24C	PDF