DSP56321T Search Results

DSP56321T Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
DSP56321TDS		Freescale Semiconductor	DSP56321T 24-Bit Digital Signal Processor		Original	PDF
DSP56321TFC220D		Freescale Semiconductor	DSP,DSP56300 Family,Enhanced Dual Harvard Architecture,220MIPS		Original	PDF
DSP56321TFC220D		Motorola	DSP,DSP56300 Family,Enhanced Dual Harvard Architecture,220MIPS		Original	PDF
DSP56321TFC240D		Freescale Semiconductor	DSP,DSP56300 Family,Enhanced Dual Harvard Architecture,2400MIPS		Original	PDF
DSP56321TFC240D		Motorola	DSP,DSP56300 Family,Enhanced Dual Harvard Architecture,2400MIPS		Original	PDF

DSP56321T Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: Technical Data Advance Information DSP56321T/D Rev. 1, 8/2002 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits Address Generation	Original	DSP56321T/D 24-Bit DSP56321T DSP56300 DSP56321T/D	PDF
Untitled Abstract: No abstract text available Text: Freescale Semiconductor, Inc. DSP56321T/D Rev. 2, 10/2002 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits Address Generation Unit Six Channel DMA Unit X Data	Original	DSP56321T/D 24-Bit DSP56321T DSP56300 DSP56321T/D DSP56303, DSP56309, DSP56311, DSP56321	PDF
DSP56000 Abstract: DSP56300 DSP56303 DSP56309 DSP56311 DSP56L307 HR-R Text: Freescale Semiconductor, Inc. Technical Data Advance Information DSP56321T/D Rev. 2, 10/2002 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits Address Generation	Original	DSP56321T/D 24-Bit DSP56300 DSP56321T DSP56300 DSP56000 DSP56303 DSP56309 DSP56311 DSP56L307 HR-R	PDF
F324 Abstract: 2.1 to 5.1 home theatre circuit diagram 74 hc 589 adaptive filter noise cancellation bc 339 DSP56300 finite impulse response SCR FIR 3 D WL 431 DSP56000 DSP56300 Text: Technical Data Advance Information DSP56321T/D Rev. 2, 10/2002 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits Address Generation	Original	DSP56321T/D 24-Bit DSP56321T DSP56300 F324 2.1 to 5.1 home theatre circuit diagram 74 hc 589 adaptive filter noise cancellation bc 339 DSP56300 finite impulse response SCR FIR 3 D WL 431 DSP56000	PDF
MPS OUTSIDE BOX PACKING SPECIFICATION Abstract: No abstract text available Text: Technical Data Advance Information DSP56321T/D Rev. 1, 8/2002 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits Address Generation	Original	DSP56321T/D 24-Bit DSP56321T DSP56300 196-lead DSP56321TFC220D DSP56321TFC240D SPAK321TFC240D MPS OUTSIDE BOX PACKING SPECIFICATION	PDF
DSP56321VF220 sch Abstract: arco 404 DSP56321VF275 DSP56321VL275 DSP56321 DSP56321VF200 DSP56321VL200 DSP56321VL220 DSP56321VL240 Text: Freescale Semiconductor Technical Data DSP56321 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit DDB YDB XDB PDB GDB Internal Data Bus Switch EXTAL XTAL RESET PINIT/NMI	Original	DSP56321 24-Bit 24-Bit DSP56300 DSP56321VF200, DSP56321VF220, DSP56321VF240, DSP56321VF275, DSP56321VL200, DSP56321VL220, DSP56321VF220 sch arco 404 DSP56321VF275 DSP56321VL275 DSP56321 DSP56321VF200 DSP56321VL200 DSP56321VL220 DSP56321VL240	PDF
DSP56000 Abstract: DSP56300 DSP56300FM DSP56303 DSP56309 DSP56311 DSP56321 DSP56321RM DSP56L307 Text: Freescale Semiconductor Technical Data DSP56321 Rev. 11, 2/2005 DSP56321 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit DDB YDB XDB PDB GDB Internal Data Bus Switch	Original	DSP56321 24-Bit 24-Bit DSP56300 DSP56000 DSP56300 DSP56300FM DSP56303 DSP56309 DSP56311 DSP56321 DSP56321RM DSP56L307	PDF
DSP56000 Abstract: DSP56300 DSP56300FM DSP56303 DSP56309 DSP56311 DSP56321 DSP56321RM DSP56L307 DSP56321VF275 Text: Freescale Semiconductor Technical Data DSP56321 Rev. 11, 2/2005 DSP56321 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit DDB YDB XDB PDB GDB Internal Data Bus Switch	Original	DSP56321 24-Bit 24-Bit DSP56300 DSP56000 DSP56300 DSP56300FM DSP56303 DSP56309 DSP56311 DSP56321 DSP56321RM DSP56L307 DSP56321VF275	PDF
Untitled Abstract: No abstract text available Text: Technical Data DSP56321/D Rev. 8, 11/2003 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits Address Generation Unit Six Channel	Original	DSP56321/D 24-Bit DSP56321 DSP56321/D,	PDF
LMS adaptive filter Abstract: code iir filter dsp56300 coefficients dc mac org frequency FA0000 example code iir filter dsp56300 coefficients dc mac org frequency Text: MOTOROLA Order Number: DSP56321/D Rev. 1, 10/2001 Semiconductor Products Sector Technical Data DSP56321 Advance Information 24-BIT DIGITAL SIGNAL PROCESSOR The Motorola DSP56321, a member of the DSP56300 family of programmable Digital Signal Processors DSPs , supports network applications with general filtering operations. The on-chip Enhanced Filter	Original	DSP56321/D 24-BIT DSP56321 DSP56321, DSP56300 DSP56321 DSP56321/D LMS adaptive filter code iir filter dsp56300 coefficients dc mac org frequency FA0000 example code iir filter dsp56300 coefficients dc mac org frequency	PDF
Transistor FST 460 Abstract: DSP56000 DSP56300 DSP56303 DSP56309 DSP56311 DSP56321 DSP56L307 EB610 Text: Technical Data DSP56321/D Rev. 7, 6/2003 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits Address Generation Unit Six Channel	Original	DSP56321/D 24-Bit DSP56321 DSP56321/D, Transistor FST 460 DSP56000 DSP56300 DSP56303 DSP56309 DSP56311 DSP56L307 EB610	PDF
Untitled Abstract: No abstract text available Text: DSP56321 Rev. 11, 2/2005 Freescale Semiconductor Technical Data DSP56321 24-Bit Digital Signal Processor 3 16 6 6 ESSI Peripheral Expansion Area EFCOP Address Generation Unit Six Channel DMA Unit DDB YDB XDB PDB GDB Internal Data Bus Switch EXTAL XTAL RESET	Original	DSP56321 24-Bit 24-Bit DSP56300	PDF
DSP56300 Abstract: DSP56000 DSP56303 DSP56309 DSP56311 DSP56321 DSP56L307 83a556 SBR 2512 Text: Technical Data Advance Information DSP56321/D Rev. 3, 5/2002 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction	Original	DSP56321/D 24-Bit DSP56321 DSP56300 DSP56000 DSP56303 DSP56309 DSP56311 DSP56L307 83a556 SBR 2512	PDF
Untitled Abstract: No abstract text available Text: Freescale Semiconductor Technical Data DSP56321 Rev. 11, 2/2005 DSP56321 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit DDB YDB XDB PDB GDB Internal Data Bus Switch	Original	DSP56321 24-Bit 24-Bit DSP56300	PDF

FFFF86 Abstract: DSP56000 DSP56300 DSP56303 DSP56309 DSP56311 DSP56321 DSP56L307 24DC Text: Technical Data Advance Information DSP56321/D Rev. 6, 11/2002 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction	Original	DSP56321/D 24-Bit DSP56321 FFFF86 DSP56000 DSP56300 DSP56303 DSP56309 DSP56311 DSP56L307 24DC	PDF
Untitled Abstract: No abstract text available Text: Technical Data DSP56321/D Rev. 9, 2/2004 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits Address Generation Unit Six Channel	Original	DSP56321/D 24-Bit DSP56321 DSP56321/D,	PDF
aa1bb Abstract: MFE 409 Text: Technical Data Advance Information DSP56321/D Rev. 4, 8/2002 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit Program RAM 32 K x 24 bits or 31 K × 24 bits and Instruction	Original	DSP56321/D 24-Bit DSP56321 DSP56321/D aa1bb MFE 409	PDF
DSP56300 finite impulse response Abstract: 24233 ca641A DSP56000 DSP56300 DSP56311 DSP56321 Text: MOTOROLA Order Number: DSP56321/D Rev. 0, 7/2001 Semiconductor Products Sector Technical Data DSP56321 Advance Information 24-BIT DIGITAL SIGNAL PROCESSOR The Motorola DSP56321, a member of the DSP56300 family of programmable Digital Signal Processors DSPs , supports network applications with general filtering operations. The on-chip Enhanced Filter	Original	DSP56321/D DSP56321 24-BIT DSP56321, DSP56300 DSP56321 DSP56300 finite impulse response 24233 ca641A DSP56000 DSP56311	PDF