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    HYUF6404D

    Abstract: HYUF6404
    Text: HY62UF16404D Series 256Kx16bit full CMOS SRAM Document Title 256K x16 bit 2.7 ~ 3.3V Super Low Power FCMOS Slow SRAM Revision History Revision No History Draft Date Remark 00 Initial Draft Dec.20.2000 Preliminary 01 Changed Logo Mar.23.2001 Preliminary 02


    Original     		PDF HY62UF16404D 256Kx16bit HYUF6404D HYUF6404D HYUF6404

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    Abstract: No abstract text available
    Text: HY62UF16404D Series 256Kx16bit full CMOS SRAM Document Title 256K x16 bit 2.7 ~ 3.3V Super Low Power FCMOS Slow SRAM Revision History Revision No History Draft Date Remark 00 Initial Draft Dec.20.2000 Preliminary 01 Changed Logo Mar.23.2001 Preliminary 02


    Original     		PDF HY62UF16404D 256Kx16bit HYUF6404D

    HYUF6404D

    Abstract: HYUF6404
    Text: H Y 6 2U F 1 640 4D S eries 2 56K X 16bit full C M O S SRAM Preliminary DESCRIPTION FEATURES The HY62UF16404D is a high speed, super low power and 4Mbit full CMOS SRAM organized as 256K words by 16bits. The HY62UF16404D uses high performance full CMOS process technology


    OCR Scan     		PDF 16bit HY62UF16404D 16bits. 48-ball HYUF6404D HYUF6404