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Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: XAUI IP Core User’s Guide January 2012 IPUG68_01.6 Table of Contents Chapter 1. Introduction . 4 Quick Facts . 4	Original	IPUG68 LFE3-35E-7FN484CES LFE3-70E-7FN672CES LFE3-150E-7 FN1156CES D-2009	PDF
TN1176 Abstract: LFE395 alarm clock design of digital verilog IPUG68 CRPAT Text:  LatticeECP3 XAUI Demo Design User’s Guide July 2010 UG23_01.2  LatticeECP3 XAUI Demo Design User’s Guide Lattice Semiconductor Introduction This document provides technical information and instructions on using the LatticeECP3 XAUI Demo Design.	Original	TN1176. TN1176 LFE395 alarm clock design of digital verilog IPUG68 CRPAT	PDF
h945 Abstract: H944 transistor h945 h965 h946 H948 IR1518 BCM56800 h945 transistor H808 Text: LatticeECP3 and Broadcom 10 Gbps Physical/MAC Layer Interoperability July 2010 Technical Note TN1218 Introduction This technical note describes a Physical/MAC layer 10-Gigabit Ethernet interoperability test between a LatticeECP3 device and the Broadcom BCM56800 network switch. The test exercises the Physical/MAC layer	Original	TN1218 10-Gigabit BCM56800 h945 H944 transistor h945 h965 h946 H948 IR1518 h945 transistor H808	PDF
h946 Abstract: H945 H944 h965 H924 h940 295050 transistor h945 H948 transistor BC rx Text: LatticeECP3 and Marvell 10 Gbps Physical/MAC Layer Interoperability July 2010 Technical Note TN1219 Introduction This technical note describes a Physical/MAC Layer 10-Gigabit Ethernet interoperability test between a LatticeECP3 device and the Marvell Alaska 88X2040 device. The test exercises the Physical/MAC Layer up to	Original	TN1219 10-Gigabit 88X2040 h946 H945 H944 h965 H924 h940 295050 transistor h945 H948 transistor BC rx	PDF