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    LH534R00 Search Results

    LH534R00 Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    LH534R00AD Sharp EPROM Parallel Async Original PDF
    LH534R00AN Sharp EPROM Parallel Async Original PDF
    LH534R00AS Sharp EPROM Parallel Async Original PDF
    LH534R00ASR Sharp EPROM Parallel Async Original PDF

    LH534R00 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    32DIP

    Abstract: 32-PIN LH534
    Text: LH534R00A CMOS 4M 512K x 8 Mask-Programmable ROM FEATURES • 524,288 words × 8 bit organization • Access time: 120 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 µW (MAX.) PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW OE1/OE1/DC


    Original     		PDF LH534R00A 32-PIN 32TSOP400 32-pin, 400-mil 600-mil DIP032-P-0600) 32DIP LH534

    lh5s4

    Abstract: LH537 lh5s4p lh5s4R lh5s46 LH538 44SOP lh533200 LH5s 5g85
    Text: MASK ROM ☆ New product ★ • M Capacity ASK F O M S Bit Pinout* configuration Model No. LH53V4T00E J J x8 4M x 16 x 8/ x 16 x8 8M x 8/ x 16 LH53V4ROOAN/AT LH53V4R00N/T J J J LH53V4YG0N/E LH53H4100D/N LH534700D/N LH534R00BD/BN LH53V4B00T J J F F LH534A00T


    OCR Scan     		PDF LH53V4T00E LH53V4ROOAN/AT LH53V4R00N/T LH53V4YG0N/E LH53H4100D/N LH534700D/N LH534R00BD/BN LH53V4B00T LH534A00T LH534BOOT lh5s4 LH537 lh5s4p lh5s4R lh5s46 LH538 44SOP lh533200 LH5s 5g85

    Untitled

    Abstract: No abstract text available
    Text: CMOS 4M 512K x 8 Mask-Programmable ROM FEATURES DESCRIPTION • 524,288 x 8 bit organization The LH534R00 is a 4M-bit mask-programmable ROM organized as 524,288 x 8 bits. It is fabricated using silicon-gate CMOS process technology. • Access time: 120 ns (MAX.)


    OCR Scan     		PDF LH534R00 32-PIN 32-pin, 600-mil 525-mil LH534R00

    lh5s4

    Abstract: lh5348 LH5s lh5s47xx 48-TSOP LH53H4100D LH53H4100N lh534y00d 48TSOP sharp mask rom
    Text: NEW PRODUCT INFORMATION SHARP LH53 H4100 • Description High-speed 4M-bit Mask-Programmable ROM ■ Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.


    OCR Scan     		PDF LH53H4100 LH53H4100D/N LH5H41XX) LH53H4100D LH53H4100N 32-pin DIP032-P-0600) OP032-P-0525) A0-A18 lh5s4 lh5348 LH5s lh5s47xx 48-TSOP LH53H4100N lh534y00d 48TSOP sharp mask rom

    536G

    Abstract: LH534600
    Text: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)


    OCR Scan     		PDF LH53259D/N/T LH53517D/N/T/TR LH531VOOD/N/TAJ LH53V1ROON/T LH530800AD/AN/AU LHS30800AD/AN-Y LH531OOOBD/BN LH531000BN-S LH531024D/N/U LH532100BD 536G LH534600

    lh57257

    Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
    Text: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429


    OCR Scan     		PDF IR2E201 IR2E24 IR2E27/A IR2E28 IR2E29 IR2E30 IR2E31/A IR2E32N9 IR2E34 IR2E41 lh57257 IR2E31 IR2E01 IR2C07 IR2E27 IR2E19 IR2E31A IR3n06 IR2E02

    LH231G

    Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
    Text: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200


    OCR Scan     		PDF 28DIP 28DIP LH2389D LH23128D LH23286D LH236120 LH2310006D LH231G lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235

    flash 64m

    Abstract: No abstract text available
    Text: MEMORIES Mask ROMs C a p a c ity Access time C o nfig u ra tio n 120ns 100ns 80ns 150ns 256kj I 32k x 8 ] LH53259 12k I 64k x 8 LH53517 128k x 8 LH530800A LH531V00 1M LH531024 64k x 16 i LH532100B-1 256k x 8 ! LH532100B 2M JEDEC standard EPROM pinout 128k x 161


    OCR Scan     		PDF 100ns 120ns 150ns 256kj LH53259 LH53517 LH531V00 LH530800A LH531024 LH532048 flash 64m

    lh5348

    Abstract: lh5s4 48TSO
    Text: ü fi LH53V4R00 LH53V4R00-2 • Description ■ Pin Connect for T h e L H 5 3 V 4 R 0 0 N /T , L H 5 3 V 4 R 0 0 N /T -2 U ser's N o . : L H 5V 4R X X is a CM OS 4 M -b it m ask-program m able ROM 32-pin SOP organized as 524 288 X 8 bits. It provides a high-speed access time o f 120/150 ns with low


    OCR Scan     		PDF LH53V4R00 LH53V4R00-2 32-pin LHS3V4R00-2 lh5348 lh5s4 48TSO

    lh5348

    Abstract: TSOP032-P-0820 lh5s4 flash memory sop 32-pin lh5348xx lh5s47xx
    Text: NEW PRODUCT INFORMATION LH53V4R00 LH53V4R00-2 • Low-Voltage • High-Speed 4M-bit Mask-Programmable ROM Description Pin Connection T he L H 5 3 V 4 R 0 0 N /T , L H 5 3 V 4 R 0 0 N /T -2 U s e r's N o. : LH5V4RXX is a CM O S 4M -bit m ask-program m able ROM


    OCR Scan     		PDF LH53V4R00 LH53V4R00-2 LH53V4R00N/T, LH53V4R00N/T-2 LH53V4R00 LH53V4R00N1LH53V4R00N-2 32-pin lh5348 TSOP032-P-0820 lh5s4 flash memory sop 32-pin lh5348xx lh5s47xx

    lh5s4

    Abstract: lh5348 sharp lh53 lh5s47xx LH5S47 60446 sharp mask rom LH53V4R00N LH5H41XX TSOP032-P-0820
    Text: NEW PRODUCT INFORMATION LH53V4R00 LH53V4R00-2 • Description Low-Voltage • High-Speed 4M-bit Mask-Programmable ROM Pin Connection The L H 53V 4R 00N /T , L H 53V 4 R 0 0 N /T -2 U ser’s N o. : LH5V4RXX is a CMOS 4M -bit mask-programmable ROM 32-pin SOP


    OCR Scan     		PDF LH53V4R00 LH53V4R00-2 LH53V4R00N/T, LH53V4R00N/T-2 32-pin LH53V4R00N lh5s4 lh5348 sharp lh53 lh5s47xx LH5S47 60446 sharp mask rom LH5H41XX TSOP032-P-0820

    LQ070T5BG01

    Abstract: LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506
    Text: INDEX 1 0 4 - 1 0 9 _ DC_ GL1PR112.69 GL3KG63. 66 GL5EG41.66 1 0 4 - n 0 5 O o c .113 DC1B1CP. 100 GL1PR135.69 GL3KG8. 66


    OCR Scan     		PDF 109-n GL1PR112. GL1PR135. GL1PR136. GL1PR211. GL1PR212. GL3KG63. GL3P201. GL3P202. GL3P305. LQ070T5BG01 LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506

    DIC14

    Abstract: 78A3
    Text: CMOS 4M 512K x 8 Mask-Programmable ROM • Access time: 120 ns (MAX.) 32-PIN DIP 32-PIN SOP TOP VIEW /•* O E t/Ö Ii/D C L • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 nW (MAX.) 2 31 H A ib A is LI 3 30 □ a A12C 4 29 H a 14 a 7C 5 26 ^ a 13


    OCR Scan     		PDF 32-pin, 600-mil 525-mil 400-mil 32-PIN DIC14 78A3

    IR3Y29B

    Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
    Text: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX


    OCR Scan     		PDF ARM710 ARM810 IR3T24 IR3T24N IR3Y05Y IR3Y08 IR3Y12B IR3Y18A IR3Y21 IR3Y26A IR3Y29B ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR2E02

    48 tsop flash pinout

    Abstract: LH23512
    Text: MEMORIES Mask ROMs ^Under development Capacity Pinout Model No. Configuration Access time ns 55 1 64k !- 1 8k x 8 128k 16k x ! 256k 32k x 8 |- -) [ 512k 64k x 8 b — I 80 100 120 150 200 Package 250 500 □ LH2369 28 LH23255 28 □ LH53259 28 28 38(1)


    OCR Scan     		PDF LH2369 LH23126 LH23255 LH53259 LH23512 LH53517 LH53H0900 LH531VOO LH530800A LH530800A-Y 48 tsop flash pinout

    Untitled

    Abstract: No abstract text available
    Text: CMOS 4M 512K x 8 Mask-Program m able ROM DESCRIPTION FEATURES • 524,288 x 8 bit organization • Access time: 120 ns (MAX.) • Power consumption: Operating: 358 mW (MAX.) Standby: 550 jiW (MAX.) • Mask-programmable control pin: Pin 1 - OE^OEi/DC Pin 24 - OBOE


    OCR Scan     		PDF LH534R00 32-pin, 600-mil 525-mil 32-PIN 534R00-3 LH534R00

    Untitled

    Abstract: No abstract text available
    Text: CMOS 4M 512K x 8 Mask-Programmable ROM FEATURES • 524,288 words x 8 bit organization • Power consumption: Operating: 357.5 mW (MAX.) 32-PIN DIP 32-PIN SOP TOP VIEW A1 6 ^ 1 • 2 A1 5 C 3 30 □ a 17 A 1 2 IZ 4 29 □ a 14 a 7C 5 28 3 a 13 ^6 H 6 27 □ Ag


    OCR Scan     		PDF 32-pin, 600-mil 525-mil 400-mil 32-PIN

    IR2E27A

    Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
    Text: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080


    OCR Scan     		PDF Core28 IR2C24A/AN IR2C26 IR2C30/N IR2C32 IR2C33 IR2C34 IR2C36 IR2C38/N IR2C43 IR2E27A IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31

    lh5s4

    Abstract: LH-MN47XX lh5s4axx LH5359 LH5s lh5317 LH532CXX 32DIP
    Text: MEMORIES • JEDEC Standard EPROM Pinout • Low voltage operation 3 V, 1.8 V Access time Bit Capacity configuration 1M 2M 4M Model No. LH53V1ROON/T LH53V2R00AN/AT LH53V2T00E LH53V2YOONÆ LH53V4T00E LH53V4R00AN/AT LH53V4Y00NÆ x 8 x 8 x 8 User’s No. Supply


    OCR Scan     		PDF LH53V1ROON/T LH53V2R00AN/AT LH53V2T00E LH53V2YOONÆ LH53V4T00E LH53V4R00AN/AT LH53V4Y00NÆ 32SOP/32TSOP 32TSOP lh5s4 LH-MN47XX lh5s4axx LH5359 LH5s lh5317 LH532CXX 32DIP

    sharp mask rom

    Abstract: cd rom 40 pinout lh5348 lh5s4 LH5S
    Text: NEW PRODUCT INFORMATION SHARP LH53H4000 • Description The LH53H4000D/N User's No. : LH5H40XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits (Byte mode) or 262 144 X 16 bits (Word mode) that can be selected by BYTE input pin. ■ Features


    OCR Scan     		PDF LH53H4000 LH53H4000D/N LH5H40XX) LH53H4000D 40-pin DIP040-P-0600) LH53H4000N OP040-P-0525) 40DIP/40SOP/48TSOP sharp mask rom cd rom 40 pinout lh5348 lh5s4 LH5S

    lh5348

    Abstract: lh5s4 lh5348xx sharp mask rom LH534A00T LH5s LH534B00T 40-DIP
    Text: NEW PRODUCT INFORMATION SHARP LH53H4100 • High-speed 4M-bit Mask-Programmable ROM ■ Description Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.


    OCR Scan     		PDF LH53H4100 LH53H4100D/N LH5H41XX) LH53H4100D 32-pin DIP032-P-0600) LH53H4100N OP032-P-0525) 4P00N/T lh5348 lh5s4 lh5348xx sharp mask rom LH534A00T LH5s LH534B00T 40-DIP

    Untitled

    Abstract: No abstract text available
    Text: CMOS 4M 1M x 4 MROM FEATURES • 524,288 x 8 bit organization • Access time: 120 ns (MAX.) • Supply current: -O p e ra tin g : 65 mA (MAX.) -S ta n d b y : 100[iA(M AX.) • Three-state output • Single +5 V Power supply PIN CONNECTIONS 32-PIN SOP 32-PIN DIP


    OCR Scan     		PDF 32-PIN 32-pin, 600-mil LH534R00B 32DIP DIP032-P-0600) LH534R00B

    Untitled

    Abstract: No abstract text available
    Text: CMOS 4M 512K x 8 Mask-Programmable ROM PIN CONNECTIONS • 524,288 words x 8 bit organization TOP VIEW f 1• O E^Ô Ë/D C E • Power consumption: Operating: 357.5 mW (MAX.) A ie E 2 31 E a 18 A15E 3 30 □ a 17 A12E 4 29 □ a 14 A7E 5 28 □ a 13 A0 e


    OCR Scan     		PDF 32-PIN 32-pin, 600-mil 525-mil 400-mil 32TSOP400

    lh5348

    Abstract: lh5348xx sharp mask rom lh5s4
    Text: NEW PRODUCT INFORMATION SHARP LH53 H 4100 • High-speed 4M-bit Mask-Programmable ROM ■ Description Pin Connections The LH53H4100D/N User’s No. : LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.


    OCR Scan     		PDF LH53H4100D/N LH5H41XX) LH53H4100D 32-pin DIP032-P-0600) LH53H4100N OP032-P-0525) A40TSOP 40DIP/44QFJ lh5348 lh5348xx sharp mask rom lh5s4