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    LV132 Search Results

    LV132 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LV132ATELL-E Renesas Electronics Corporation HD74LV-A Series Visit Renesas Electronics Corporation
    74LV132AFPEL-E Renesas Electronics Corporation HD74LV-A Series Visit Renesas Electronics Corporation
    SN74LV132APWR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 125 Visit Texas Instruments Buy
    SN74LV132ADR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SOIC -40 to 125 Visit Texas Instruments Buy
    SN74LV132ADGVR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-TVSOP -40 to 125 Visit Texas Instruments Buy
    SF Impression Pixel

    LV132 Price and Stock

    Nexperia 74LV132PW,118

    IC GATE NAND 4CH 2-INP 14TSSOP
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    DigiKey 74LV132PW,118 Cut Tape 20,838 1
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    Texas Instruments SN74LV132APWR

    IC GATE NAND 4CH 2-INP 14TSSOP
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    DigiKey SN74LV132APWR Digi-Reel 8,816 1
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    Bristol Electronics SN74LV132APWR 11,165 9
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    Texas Instruments SN74LV132ADR

    IC GATE NAND 4CH 2-INP 14SOIC
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    Texas Instruments SN74LV132AD

    IC GATE NAND 4CH 2-INP 14SOIC
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    Texas Instruments SN74LV132ADGVR

    IC GATE NAND 4CH 2-INP 14TVSOP
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    Find more LV132 price and stock on Findchips.com

    LV132 Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    LV132566101N1 Fiber Optic Center Indoor/Outdoor Stranded Design Original PDF
    LV1325CC101N1 Alcoa Fujikura INDOOR / OUTDOOR STRANDED DESIGN Original PDF
    LV132666101N1 Fiber Optic Center Indoor/Outdoor Stranded Design Original PDF
    LV1326CC101N1 Alcoa Fujikura INDOOR / OUTDOOR STRANDED DESIGN Original PDF
    LV132966101N1 Fiber Optic Center Indoor/Outdoor Stranded Design Original PDF
    LV1329CC101N1 Alcoa Fujikura INDOOR / OUTDOOR STRANDED DESIGN Original PDF

    LV132 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    circuit diagram water level INFRARED sensor

    Abstract: No abstract text available
    Text: DISCRIMINATING LIQUID SENSOR for Interstitial Applications Shown Actual Size Double-Wall Tanks, Containment Sumps, and Double-Wall Pipes Applications Integral Pull Your Controls Containment S ump Model LV132 $ 160 MADE IN USA ߜ Three Distinct Outputs: Dry, Water Present, Fuel


    Original     		LV132 LV132 circuit diagram water level INFRARED sensor PDF

    SN74LV132APWR

    Abstract: A115-A C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A SN74LV132APWR A115-A C101 LV132A SN54LV132A SN74LV132A PDF

    LV132A

    Abstract: SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394B – APRIL 1998 – REVISED AUGUST 1998 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394B MIL-STD-883, SN54LV132A LV132A SN54LV132A SN74LV132A PDF

    texas instruments package marking

    Abstract: lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS
    Text: TEXAS INSTRUMENTS Informational Notification for the Symbolization Change of Select Devices in ‘NS’ Package November 5, 1998 Abstract Texas Instruments Inc., Standard Linear and Logic products SLL is in the process of converting topside symbolization on a few select devices in the ‘NS’ package to show the ‘74’ prefix before the


    Original     		SN74LV139ANSR SN74LV174ANS SN74LV174ANSR SN74LV175ANS SN74LV175ANSR SN74LV273ANS SN74LV273ANSR SN74LV540ANS SN74LV540ANSR SN74LV573ANS texas instruments package marking lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS PDF

    7054F

    Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
    Text: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver


    Original     		2sc4537 2sc454. 2sc4591 2sc4592 2sc4593 2sc460. 2sc4628 2sc4629 2sc4643 2sc4680 7054F BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557 PDF

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A A115-A C101 LV132A SN54LV132A SN74LV132A PDF

    SN74 schmitt trigger

    Abstract: SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A
    Text: LVC and LV LowĆVoltage CMOS Logic Data Book 1998 Logic Products General Information LVC Gates and MSI LVC Octals LVC Widebus LVC 3.3-V to 5-V Translators and Cable Drivers LV Gates and MSI LV Octals Application Reports Mechanical Data LVC and LV Low-Voltage CMOS Logic


    Original     		MIL-STD-1835 GDFP2-F20 SN74 schmitt trigger SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A PDF

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: LV132A, LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original     		SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A. A115-A C101 LV132A SN54LV132A SN74LV132A PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394C MIL-STD-883, SN74LV132A, ////roarer/root/data13/imaging/BIT. /08032000/TXII/08022000/sn74lv132a SDYU001M, SCAU001A, SCEM128, PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A PDF

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		SN54LV132A, SN74LV132A SCLS394D SN54LV132A 000-V A114-A) A115-A) A115-A C101 LV132A SN54LV132A SN74LV132A PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A PDF

    LV132A

    Abstract: A115-A C101 SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		SN54LV132A, SN74LV132A SCLS394D SN54LV132A 000-V A114-A) A115-A) LV132A A115-A C101 SN54LV132A SN74LV132A PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		SN54LV132A, SN74LV132A SCLS394D 000-V A114-A) A115-A) SN54LV132A SN74LV132A PDF

    GR-20-CORE

    Abstract: OFNR UL
    Text: Page 1 of 2 Indoor/Outdoor Stranded Design Features and Benefits • 200/500 MHz * km increased bandwidth for higher data rates. • Dry core design (No messy gel). • Fiber counts up to 144. • Easy fiber access for installation. • Color coded buffer tubes and


    Original     		LV006 66101N1 50/125/250um 5/125/250um 9/125/250um GR-20-CORE OFNR UL PDF

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A A115-A C101 LV132A SN54LV132A SN74LV132A PDF

    lvc16244

    Abstract: BC240 2sk3174 CBT1G125 LV2GT14A HC32 Hitachi HA13557A transistor 2SC1162 H8 hitachi programming manual 30204SP
    Text: HITACHI ELECTRONIC COMPONENTS DATABOOK 2003 INDEX General Informations Multi Perpose Products Safety Considerations Hitachi Semiconductor Package Databook HITACHI Sales Locations Diodes Microcontroller Microcontroller General Microcontroller Overview List


    Original     		HD49323A HA12134A HA12141N HA12155N HA12163 HA12167F HA12173 HA12179F HA12181F HA12187F lvc16244 BC240 2sk3174 CBT1G125 LV2GT14A HC32 Hitachi HA13557A transistor 2SC1162 H8 hitachi programming manual 30204SP PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: LV132A, LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original     		SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A. PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: LV132A, LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original     		SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A. PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A PDF

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A PDF

    39-4B

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS S C LS 394B - A P R IL 1998 - R EVISED A U G U S T 1998 EPIC Enhanced-Performance Implanted CMOS Process LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE


    OCR Scan     		SN54LV132A, SN74LV132A MIL-STD-883, SN54LV132A SN74LV1m 39-4B PDF

    74LV132

    Abstract: 74LV132PW V00224
    Text: Philips Semiconductors Product specification Quad 2-input NAND Schmitt-trigger LV132 FEATURES APPLICATIONS • W ide operating voltage: 1.0 to 5.5V • Wave and pulse shapers • Optim ized for Low Voltage applications: 1.0 to 3.6V • Astable m ultivibrators


    OCR Scan     		74LV132 74HC/HCT132. SQT402-1 MO-153 74LV132PW V00224 PDF