Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: - power 18-bit registered bus transceiver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is
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OCR Scan
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18-BIT
250ps
MIL-STD-883,
200pF,
635mm
IDT74LVC162501A
LVC162501
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PDF
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74LVC05
Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Text: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed
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Original
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32-bit,
compatibilit-7850
74LVC05
7400 datasheet 2-input nand gate
74LVC05A
LVC1G04
transistor x1 pv 25
inverter board design pv
74ALVC1G04
74ALVCH244
7400 nand gate series
74ALVC1G14
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PDF
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LVC162501A
Abstract: SO56-2
Text: LVC162501A 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER W/ 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: LVC162501A ADVANCE INFORMATION DESCRIPTION:
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Original
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IDT74LVC162501A
18-BIT
18-BIT
250ps
MIL-STD-883,
200pF,
635mm
SO56-1)
SO56-2)
LVC162501A
SO56-2
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PDF
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Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: - power 18-bit registered bus transceiver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is
|
OCR Scan
|
18-BIT
250ps
MIL-STD-883,
200pF,
635mm
IDT74LVC162501A
LVC162501
48-Pin
56-Pin
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PDF
|
Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O D E S C R IP TIO N : FEATURES: - Typical - ESD > 2000V per MIL-STD-883, Method 3015; tsK o (Output Skew) < 250ps > 200V using machine model (C = 200pF, R = 0) - LVC162501A
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OCR Scan
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18-BIT
IDT74LVC162501A
62501A
48-Pin
56-Pin
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PDF
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