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    Untitled

    Abstract: No abstract text available
    Text: * SY10L484-7/8/10 SY100L484-7/8/10 SY101L484-7/8/10 LOW-POWER 4K x 4 ECL RAM SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES • Address access time, tAA: ■ Chip select access time, 7/8/1 Ons max. tA c : T h e S ynergy S Y 1 0L/1 00L /101 L48 4 are 16384-bit R andom


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    PDF SY10L484-7/8/10 SY100L484-7/8/10 SY101L484-7/8/10 16384-bit 10K/100K F28-1 SY10L/10017101L484-10YCS Y28-1 Q013fll

    F100K

    Abstract: SY100S317 SY100S317DC SY100S317FC ez 623
    Text: « Ä TRIPLE 2-WIDE OA/OAi g a t e SYNERGY s y io o s 317 SE M IC O N D U C TO R FEATURES DESCRIPTION I Max. propagation delay of 900ps The S Y 100S 317 is a set of ultra-fast, triple 2-w ide OR/ AND gates designed for use in high-perform ance ECL system s. T his device offers both true and com plem ent


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    PDF SY100S317 900ps -48mA F100K D00E173 SY100S317DC D24-1 SY100S317FC F24-1 F100K SY100S317 ez 623