rt54sx32su
Abstract: RTSX72 RTSX32SU RTSX72-S
Text: Advanced v0.1 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case
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TM1019
rt54sx32su
RTSX72
RTSX32SU
RTSX72-S
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Untitled
Abstract: No abstract text available
Text: v2 . 1 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case
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TM1019
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RTSX32SU
Abstract: RTSX32 PQFP die size C5249 bst r16 166 P790 actel 1020 datasheet A54SX72A CC256 CQ208
Text: Advanced v0.3 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case
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Original
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TM1019
RTSX32SU
RTSX32
PQFP die size
C5249
bst r16 166
P790
actel 1020 datasheet
A54SX72A
CC256
CQ208
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PDF
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RTSX72
Abstract: RTSX72SU A54SX72A TID "tristate buffer" A54SX32S-PQ208 RT54SXproto
Text: Advanced v0.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case
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TM1019
RTSX72
RTSX72SU
A54SX72A TID
"tristate buffer"
A54SX32S-PQ208
RT54SXproto
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PDF
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SU 177
Abstract: RTSX32SU A54SX72* radiation Actel a54sx72a tid antifuse A54SX72A CC256 CG624 CQ208 CQ256
Text: Advanced v0.3 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case
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Original
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TM1019
SU 177
RTSX32SU
A54SX72* radiation
Actel a54sx72a tid
antifuse
A54SX72A
CC256
CG624
CQ208
CQ256
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ACTEL CCGA 624 mechanical
Abstract: No abstract text available
Text: v2 . 0 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case
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TM1019
ACTEL CCGA 624 mechanical
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ACTEL CCGA 624 mechanical
Abstract: 208-Pin CQFP Actel a54sx72a tid CCGA -CG 472
Text: v2 . 2 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case
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Original
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TM1019
ACTEL CCGA 624 mechanical
208-Pin CQFP
Actel a54sx72a tid
CCGA -CG 472
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